NB7L111M: Clock / Data Driver, 2:1:10 Differential, 6.125 Gbps, 2.5 V / 3.3 V, with CML Output

具体说明: The NB7L111M is a low skew 2:1:10 differential clo...
  • The NB7L111M is a low skew 2:1:10 differential clock/data driver, designed with clock/data distribution in mind. It accepts two clock/data sources into multiplexer input and reproduces ten identical CML differential outputs. This device is ideal for clock/data distribution across the backplane or a board, and redundant clock switchover applications.
    The input signals can be either differential or single-ended (if the external reference voltage is provided). Differential inputs incorporate internal 50 Ohm termination resistors and accept Negative ECL (NECL), Positive ECL (PECL), LVCMOS, LVTTL, CML, or LVDS (using appropriate power supplies). The differential 16 mA CML output provides matching internal 50 Ohm termination, and 400 mV output swing when externally terminated 50 Ohm to VCC.
    The NB7L111M operates from a 2.5 V +/-5% supply or a 3.3 V +/- 5% supply and is guaranteed over the full industrial temperature range of -40C to +85C. This device is packaged in a low profile 8x8 mm, QFN−52 package with 0.5 mm pitch (see package dimension on the back of the datasheet).
    Application notes, models, and support documentation are available at www.onsemi.com.
  • 特性
  • Maximum Input Clock Frequency > 5.5 GHz Typical
  • Maximum Input Data Rate > 6.125 Gb/s Typical
  • < 0.5 ps Maximum Clock RMS Jitter
  • < 15 ps Maximum Data Dependent Jitter at 3.125 Gb/s
  • 50 ps Typical Rise and Fall Times
  • 240 ps Typical Propagation Delay
  • 2 ps Typical Duty Cycle Skew
  • 10 ps Typical Within Device Skew
  • 15 ps Typical Device-to-Device Skew
  • Operating Range: 2.5 V ±5% and 3.3 V ±5%
  • 400 mV Differential CML Output Swing
  • 50 Ω Internal Input and Output Termination Resistors
  • Pb-Free Packages are Available
  • 应用
  • SATA, PCI Express Gen2 4xFC & GbE Data Fan-out
  • Precision Clock Distribution / Switchover
  • 技术文档及设计资源
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    NB7L111MMNG
  • 状况: Active
  • Compliance: Pb-free Halide free 
  • 具体说明: Clock / Data Driver, 2:1:10 Differential, 6.125 Gbps, 2.5 V / 3.3 V, with CML Output
  • 封装 类型: QFN-52
  • 封装 外形: 485M
  • MSL: 1
  • 容器 类型: JTRAY
  • 容器 数量: 260
  • 库存

  • Market Leadtime (weeks):13 to 16
  • Arrow:0
  • Digikey:<1K
  • PandS:<100
  • Specifications
  • Type: Buffer 
  • Channels:
  • Input / Output Ratio: 2:1:10 
  • Input Level: LVDS  ECL  CMOS  CML  TTL 
  • Output Level: CML 
  • VCC Typ (V): 2.5  3.3 
  • tJitterRMS Typ (ps): 0.2 
  • tskew(o-o) Max (ps): 20 
  • tpd Typ (ns): 0.24  0.34 
  • tR & tF Max (ps): 75 
  • fmaxClock Typ (MHz):  
  • fmaxData Typ (Mbps): 6000 
  • Package Type: QFN-52 
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