## CMSIS USART Driver Macro Definition Documentation

### ARM_USART_API_VERSION

#define ARM_USART_API_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(2,3)

API version.

Location: Driver_USART.h:78

### ARM_USART_CONTROL_Pos

#define ARM_USART_CONTROL_Pos 0

Position of the 0th bit of the USART control field in the ARM_USART structure.

Location: Driver_USART.h:81

### ARM_USART_CONTROL_Msk

#define ARM_USART_CONTROL_Msk (0xFFUL << ARM_USART_CONTROL_Pos)

Positioning of USART control field in the ARM_USART structure.

Location: Driver_USART.h:82

### ARM_USART_MODE_ASYNCHRONOUS

#define ARM_USART_MODE_ASYNCHRONOUS (0x01UL << ARM_USART_CONTROL_Pos)

UART (Asynchronous); arg = Baudrate.

Location: Driver_USART.h:85

### ARM_USART_MODE_SYNCHRONOUS_MASTER

#define ARM_USART_MODE_SYNCHRONOUS_MASTER (0x02UL << ARM_USART_CONTROL_Pos)

Synchronous Master (generates clock signal); arg = Baudrate.

Location: Driver_USART.h:86

### ARM_USART_MODE_SYNCHRONOUS_SLAVE

#define ARM_USART_MODE_SYNCHRONOUS_SLAVE (0x03UL << ARM_USART_CONTROL_Pos)

Synchronous Slave (external clock signal).

Location: Driver_USART.h:87

### ARM_USART_MODE_SINGLE_WIRE

#define ARM_USART_MODE_SINGLE_WIRE (0x04UL << ARM_USART_CONTROL_Pos)

UART Single-wire (half-duplex); arg = Baudrate.

Location: Driver_USART.h:88

### ARM_USART_MODE_IRDA

#define ARM_USART_MODE_IRDA (0x05UL << ARM_USART_CONTROL_Pos)

UART IrDA; arg = Baudrate.

Location: Driver_USART.h:89

### ARM_USART_MODE_SMART_CARD

#define ARM_USART_MODE_SMART_CARD (0x06UL << ARM_USART_CONTROL_Pos)

UART Smart Card; arg = Baudrate.

Location: Driver_USART.h:90

### ARM_USART_DATA_BITS_Pos

#define ARM_USART_DATA_BITS_Pos 8

Position of the 0th bit of the Data bits field in the ARM_USART structure.

Location: Driver_USART.h:93

### ARM_USART_DATA_BITS_Msk

#define ARM_USART_DATA_BITS_Msk (7UL << ARM_USART_DATA_BITS_Pos)

Positioning of the Data bits field in the ARM_USART structure.

Location: Driver_USART.h:94

### ARM_USART_DATA_BITS_5

#define ARM_USART_DATA_BITS_5 (5UL << ARM_USART_DATA_BITS_Pos)

5 data bits.

Location: Driver_USART.h:95

### ARM_USART_DATA_BITS_6

#define ARM_USART_DATA_BITS_6 (6UL << ARM_USART_DATA_BITS_Pos)

6 data bits.

Location: Driver_USART.h:96

### ARM_USART_DATA_BITS_7

#define ARM_USART_DATA_BITS_7 (7UL << ARM_USART_DATA_BITS_Pos)

7 data bits.

Location: Driver_USART.h:97

### ARM_USART_DATA_BITS_8

#define ARM_USART_DATA_BITS_8 (0UL << ARM_USART_DATA_BITS_Pos)

8 data bits (default).

Location: Driver_USART.h:98

### ARM_USART_DATA_BITS_9

#define ARM_USART_DATA_BITS_9 (1UL << ARM_USART_DATA_BITS_Pos)

9 data bits.

Location: Driver_USART.h:99

### ARM_USART_PARITY_Pos

#define ARM_USART_PARITY_Pos 12

Position of the 0th bit of the Mode parameters Parity field in the ARM_USART structure.

Location: Driver_USART.h:102

### ARM_USART_PARITY_Msk

#define ARM_USART_PARITY_Msk (3UL << ARM_USART_PARITY_Pos)

Positioning of the Mode parameters Parity field in the ARM_USART structure.

Location: Driver_USART.h:103

### ARM_USART_PARITY_NONE

#define ARM_USART_PARITY_NONE (0UL << ARM_USART_PARITY_Pos)

No parity (default).

Location: Driver_USART.h:104

### ARM_USART_PARITY_EVEN

#define ARM_USART_PARITY_EVEN (1UL << ARM_USART_PARITY_Pos)

Even parity.

Location: Driver_USART.h:105

### ARM_USART_PARITY_ODD

#define ARM_USART_PARITY_ODD (2UL << ARM_USART_PARITY_Pos)

Odd parity.

Location: Driver_USART.h:106

### ARM_USART_STOP_BITS_Pos

#define ARM_USART_STOP_BITS_Pos 14

Position of the 0th bit of the Mode parameters Stop bits field in the ARM_USART structure.

Location: Driver_USART.h:109

### ARM_USART_STOP_BITS_Msk

#define ARM_USART_STOP_BITS_Msk (3UL << ARM_USART_STOP_BITS_Pos)

Positioning of the Mode parameters Stop bits field in the ARM_USART structure.

Location: Driver_USART.h:110

### ARM_USART_STOP_BITS_1

#define ARM_USART_STOP_BITS_1 (0UL << ARM_USART_STOP_BITS_Pos)

1 stop bit (default).

Location: Driver_USART.h:111

### ARM_USART_STOP_BITS_2

#define ARM_USART_STOP_BITS_2 (1UL << ARM_USART_STOP_BITS_Pos)

2 stop bits.

Location: Driver_USART.h:112

### ARM_USART_STOP_BITS_1_5

#define ARM_USART_STOP_BITS_1_5 (2UL << ARM_USART_STOP_BITS_Pos)

1.5 stop bits.

Location: Driver_USART.h:113

### ARM_USART_STOP_BITS_0_5

#define ARM_USART_STOP_BITS_0_5 (3UL << ARM_USART_STOP_BITS_Pos)

0.5 stop bits.

Location: Driver_USART.h:114

### ARM_USART_FLOW_CONTROL_Pos

#define ARM_USART_FLOW_CONTROL_Pos 16

Position of the 0th bit of the Mode parameters Flow control field in the ARM_USART structure.

Location: Driver_USART.h:117

### ARM_USART_FLOW_CONTROL_Msk

#define ARM_USART_FLOW_CONTROL_Msk (3UL << ARM_USART_FLOW_CONTROL_Pos)

Positioning of the Mode parameters Flow control field in the ARM_USART structure.

Location: Driver_USART.h:118

### ARM_USART_FLOW_CONTROL_NONE

#define ARM_USART_FLOW_CONTROL_NONE (0UL << ARM_USART_FLOW_CONTROL_Pos)

No flow control (default).

Location: Driver_USART.h:119

### ARM_USART_FLOW_CONTROL_RTS

#define ARM_USART_FLOW_CONTROL_RTS (1UL << ARM_USART_FLOW_CONTROL_Pos)

RTS flow control.

Location: Driver_USART.h:120

### ARM_USART_FLOW_CONTROL_CTS

#define ARM_USART_FLOW_CONTROL_CTS (2UL << ARM_USART_FLOW_CONTROL_Pos)

CTS flow control.

Location: Driver_USART.h:121

### ARM_USART_FLOW_CONTROL_RTS_CTS

#define ARM_USART_FLOW_CONTROL_RTS_CTS (3UL << ARM_USART_FLOW_CONTROL_Pos)

RTS/CTS flow control.

Location: Driver_USART.h:122

### ARM_USART_CPOL_Pos

#define ARM_USART_CPOL_Pos 18

Position of the 0th bit of the Mode parameters Clock polarity field in the ARM_USART structure.

Location: Driver_USART.h:125

### ARM_USART_CPOL_Msk

#define ARM_USART_CPOL_Msk (1UL << ARM_USART_CPOL_Pos)

Positioning of the Mode parameters Clock polarity field in the ARM_USART structure.

Location: Driver_USART.h:126

### ARM_USART_CPOL0

#define ARM_USART_CPOL0 (0UL << ARM_USART_CPOL_Pos)

CPOL = 0 (default).

Location: Driver_USART.h:127

### ARM_USART_CPOL1

#define ARM_USART_CPOL1 (1UL << ARM_USART_CPOL_Pos)

CPOL = 1.

Location: Driver_USART.h:128

### ARM_USART_CPHA_Pos

#define ARM_USART_CPHA_Pos 19

Position of the 0th bit of the Mode parameters Clock phase field in the ARM_USART structure.

Location: Driver_USART.h:131

### ARM_USART_CPHA_Msk

#define ARM_USART_CPHA_Msk (1UL << ARM_USART_CPHA_Pos)

Positioning of the Mode parameters Clock phase field in the ARM_USART structure.

Location: Driver_USART.h:132

### ARM_USART_CPHA0

#define ARM_USART_CPHA0 (0UL << ARM_USART_CPHA_Pos)

CPHA = 0 (default).

Location: Driver_USART.h:133

### ARM_USART_CPHA1

#define ARM_USART_CPHA1 (1UL << ARM_USART_CPHA_Pos)

CPHA = 1.

Location: Driver_USART.h:134

### ARM_USART_SET_DEFAULT_TX_VALUE

#define ARM_USART_SET_DEFAULT_TX_VALUE (0x10UL << ARM_USART_CONTROL_Pos)

Set default transmit value (synchronous receive only); arg = value.

Location: Driver_USART.h:138

### ARM_USART_SET_IRDA_PULSE

#define ARM_USART_SET_IRDA_PULSE (0x11UL << ARM_USART_CONTROL_Pos)

Set IrDA Pulse in ns; arg: 0=3/16 of bit period.

Location: Driver_USART.h:139

### ARM_USART_SET_SMART_CARD_GUARD_TIME

#define ARM_USART_SET_SMART_CARD_GUARD_TIME (0x12UL << ARM_USART_CONTROL_Pos)

Set smart card guard time; arg = number of bit periods.

Location: Driver_USART.h:140

### ARM_USART_SET_SMART_CARD_CLOCK

#define ARM_USART_SET_SMART_CARD_CLOCK (0x13UL << ARM_USART_CONTROL_Pos)

Set smart card clock in Hz; arg: 0=Clock not generated.

Location: Driver_USART.h:141

### ARM_USART_CONTROL_SMART_CARD_NACK

#define ARM_USART_CONTROL_SMART_CARD_NACK (0x14UL << ARM_USART_CONTROL_Pos)

Smart card NACK generation; arg: 0=disabled, 1=enabled.

Location: Driver_USART.h:142

### ARM_USART_CONTROL_TX

#define ARM_USART_CONTROL_TX (0x15UL << ARM_USART_CONTROL_Pos)

Transmitter; arg: 0=disabled, 1=enabled.

Location: Driver_USART.h:143

### ARM_USART_CONTROL_RX

#define ARM_USART_CONTROL_RX (0x16UL << ARM_USART_CONTROL_Pos)

Receiver; arg: 0=disabled, 1=enabled.

Location: Driver_USART.h:144

### ARM_USART_CONTROL_BREAK

#define ARM_USART_CONTROL_BREAK (0x17UL << ARM_USART_CONTROL_Pos)

Continuous break transmission; arg: 0=disabled, 1=enabled.

Location: Driver_USART.h:145

### ARM_USART_ABORT_SEND

#define ARM_USART_ABORT_SEND (0x18UL << ARM_USART_CONTROL_Pos)

Abort ARM_USART_Send.

Location: Driver_USART.h:146

### ARM_USART_ABORT_RECEIVE

#define ARM_USART_ABORT_RECEIVE (0x19UL << ARM_USART_CONTROL_Pos)

Abort ARM_USART_Receive.

Location: Driver_USART.h:147

### ARM_USART_ABORT_TRANSFER

#define ARM_USART_ABORT_TRANSFER (0x1AUL << ARM_USART_CONTROL_Pos)

Abort ARM_USART_Transfer.

Location: Driver_USART.h:148

### ARM_USART_ERROR_MODE

#define ARM_USART_ERROR_MODE (ARM_DRIVER_ERROR_SPECIFIC - 1)

Specified mode not supported.

Location: Driver_USART.h:153

### ARM_USART_ERROR_BAUDRATE

#define ARM_USART_ERROR_BAUDRATE (ARM_DRIVER_ERROR_SPECIFIC - 2)

Specified baudrate not supported.

Location: Driver_USART.h:154

### ARM_USART_ERROR_DATA_BITS

#define ARM_USART_ERROR_DATA_BITS (ARM_DRIVER_ERROR_SPECIFIC - 3)

Specified number of data bits not supported.

Location: Driver_USART.h:155

### ARM_USART_ERROR_PARITY

#define ARM_USART_ERROR_PARITY (ARM_DRIVER_ERROR_SPECIFIC - 4)

Specified parity not supported.

Location: Driver_USART.h:156

### ARM_USART_ERROR_STOP_BITS

#define ARM_USART_ERROR_STOP_BITS (ARM_DRIVER_ERROR_SPECIFIC - 5)

Specified number of stop bits not supported.

Location: Driver_USART.h:157

### ARM_USART_ERROR_FLOW_CONTROL

#define ARM_USART_ERROR_FLOW_CONTROL (ARM_DRIVER_ERROR_SPECIFIC - 6)

Specified flow control not supported.

Location: Driver_USART.h:158

### ARM_USART_ERROR_CPOL

#define ARM_USART_ERROR_CPOL (ARM_DRIVER_ERROR_SPECIFIC - 7)

Specified clock polarity not supported.

Location: Driver_USART.h:159

### ARM_USART_ERROR_CPHA

#define ARM_USART_ERROR_CPHA (ARM_DRIVER_ERROR_SPECIFIC - 8)

Specified clock phase not supported.

Location: Driver_USART.h:160

### ARM_USART_EVENT_SEND_COMPLETE

#define ARM_USART_EVENT_SEND_COMPLETE (1UL << 0)

USART Event

Send completed; however USART may still transmit data.

Location: Driver_USART.h:201

### ARM_USART_EVENT_RECEIVE_COMPLETE

#define ARM_USART_EVENT_RECEIVE_COMPLETE (1UL << 1)

Receive completed.

Location: Driver_USART.h:202

### ARM_USART_EVENT_TRANSFER_COMPLETE

#define ARM_USART_EVENT_TRANSFER_COMPLETE (1UL << 2)

Transfer completed.

Location: Driver_USART.h:203

### ARM_USART_EVENT_TX_COMPLETE

#define ARM_USART_EVENT_TX_COMPLETE (1UL << 3)

Transmit completed (optional).

Location: Driver_USART.h:204

### ARM_USART_EVENT_TX_UNDERFLOW

#define ARM_USART_EVENT_TX_UNDERFLOW (1UL << 4)

Transmit data not available (synchronous slave).

Location: Driver_USART.h:205

### ARM_USART_EVENT_RX_OVERFLOW

#define ARM_USART_EVENT_RX_OVERFLOW (1UL << 5)

Receive data overflow.

Location: Driver_USART.h:206

### ARM_USART_EVENT_RX_TIMEOUT

#define ARM_USART_EVENT_RX_TIMEOUT (1UL << 6)

Receive character timeout (optional).

Location: Driver_USART.h:207

### ARM_USART_EVENT_RX_BREAK

#define ARM_USART_EVENT_RX_BREAK (1UL << 7)

Break detected on receive.

Location: Driver_USART.h:208

### ARM_USART_EVENT_RX_FRAMING_ERROR

#define ARM_USART_EVENT_RX_FRAMING_ERROR (1UL << 8)

Framing error detected on receive.

Location: Driver_USART.h:209

### ARM_USART_EVENT_RX_PARITY_ERROR

#define ARM_USART_EVENT_RX_PARITY_ERROR (1UL << 9)

Parity error detected on receive.

Location: Driver_USART.h:210

### ARM_USART_EVENT_CTS

#define ARM_USART_EVENT_CTS (1UL << 10)

CTS state changed (optional).

Location: Driver_USART.h:211

### ARM_USART_EVENT_DSR

#define ARM_USART_EVENT_DSR (1UL << 11)

DSR state changed (optional).

Location: Driver_USART.h:212

### ARM_USART_EVENT_DCD

#define ARM_USART_EVENT_DCD (1UL << 12)

DCD state changed (optional).

Location: Driver_USART.h:213

### ARM_USART_EVENT_RI

#define ARM_USART_EVENT_RI (1UL << 13)

RI state changed (optional).

Location: Driver_USART.h:214