### RF_ANALOG_INFO

Bit Field | Read/Write | Field Name | Description
--- | --- | --- | ---
25:24 | W | BLR_READOUT_BLR_RATE | Bluetooth LE long range rate indicator
22:20 | R | PEAK_DET_VAL_PEAK_DET_FILT | Distance from the subband center (only available with the FLL method)
18:16 | R | PEAK_DET_VAL_PEAK_DET_RAW | Distance from the subband center (only available with the FLL method)
15 | R | ANALOG_INFO_POR_VDDA | VDDA LDO disable status
14 | R | ANALOG_INFO_PLL_UNLOCK | PLL unlock status
13 | R | ANALOG_INFO_XTAL_FINISH | XTAL algorithm status
12 | R | ANALOG_INFO_DLL_LOCKED | DLL lock status
11 | R | ANALOG_INFO_CLK_DIG_READY | Ready signal of the digital clock
10 | R | ANALOG_INFO_CLK_PLL_READY | PLL clock status
9:8 | R | ANALOG_INFO_SUBBAND | Status of the subband comparator Hi
7:0 | R | SUBBAND_ERR_SB_FLL_ERR | Distance from the subband center (only available with the FLL method)

Bit Field | Field Name | Value Symbol | Value Description | Hex Value
--- | --- | --- | --- | ---
25:24 | BLR_READOUT_BLR_RATE | BLR_READOUT_BLR_RATE_DEFAULT | No action | 0x0
22:20 | PEAK_DET_VAL_PEAK_DET_FILT | PEAK_DET_VAL_PEAK_DET_FILT_DEFAULT |  | 0x0*
18:16 | PEAK_DET_VAL_PEAK_DET_RAW | PEAK_DET_VAL_PEAK_DET_RAW_DEFAULT |  | 0x0*
15 | ANALOG_INFO_POR_VDDA | ANALOG_INFO_POR_VDDA_ENABLE | VDDA LDO rnabled | 0x0*
|  | ANALOG_INFO_POR_VDDA_DISABLE | VDDA LDO disabled | 0x1
14 | ANALOG_INFO_PLL_UNLOCK | ANALOG_INFO_PLL_LOCKED | PLL is locked | 0x0*
|  | ANALOG_INFO_PLL_UNLOCKED | PLL is unlocked | 0x1
13 | ANALOG_INFO_XTAL_FINISH | ANALOG_INFO_XTAL_TRIM_RUNNING | Xtal algorithm has not yet finished | 0x0*
|  | ANALOG_INFO_XTAL_TRIM_FINISHED | Xtal algorithm has finished | 0x1
12 | ANALOG_INFO_DLL_LOCKED | ANALOG_INFO_DLL_UNLOCKED | DLL is unlocked | 0x0*
|  | ANALOG_INFO_DLL_LOCKED | DLL is locked | 0x1
11 | ANALOG_INFO_CLK_DIG_READY | ANALOG_INFO_CLK_DIG_NOT_READY | Digital clock not ready | 0x0*
|  | ANALOG_INFO_CLK_DIG_READY | Digital clock ready | 0x1
10 | ANALOG_INFO_CLK_PLL_READY | ANALOG_INFO_CLK_PLL_NOT_READY | PLL clock not ready | 0x0*
|  | ANALOG_INFO_CLK_PLL_READY | PLL clock ready | 0x1
9:8 | ANALOG_INFO_SUBBAND | ANALOG_INFO_SUBBAND_DEFAULT |  | 0x0*
7:0 | SUBBAND_ERR_SB_FLL_ERR | SUBBAND_ERR_SB_FLL_ERR_DEFAULT |  | 0x0*