### RF_REG1D

Bit Field | Read/Write | Field Name | Description
--- | --- | --- | ---
31:28 | RW | AGC_PEAK_DET_PEAK_DET_TAU | Time constant of the peak detector monostable circuit
27:26 | RW | AGC_PEAK_DET_PEAK_DET_THR_LOW | Threshold for the low level of the peak detector
25 | RW | AGC_PEAK_DET_PEAK_DET_THR_HIGH | Threshold for the high level of the peak detector
24 | RW | AGC_PEAK_DET_EN_AGC_PEAK | Enable AGC peak detector
23:16 | RW | AGC_THR_HIGH_AGC_THR_HIGH | AGC threshold high level (banked)
15:8 | RW | AGC_THR_LOW_AGC_THR_LOW | AGC threshold low level (banked)
7:4 | RW | ATT_CTRL_ATT_CTRL_MAX | Maximum attenuation level in AGC algorithm
3:0 | RW | ATT_CTRL_SET_RX_ATT_CTRL | Attenuation level if the AGC is bypassed

Bit Field | Field Name | Value Symbol | Value Description | Hex Value
--- | --- | --- | --- | ---
31:28 | AGC_PEAK_DET_PEAK_DET_TAU | AGC_PEAK_DET_PEAK_DET_TAU_DEFAULT |  | 0x7*
27:26 | AGC_PEAK_DET_PEAK_DET_THR_LOW | AGC_PEAK_DET_PEAK_DET_THR_LOW_DEFAULT | 0 => 0, 1 => 1, 2 => 2, 3 => N.A. | 0x0*
25 | AGC_PEAK_DET_PEAK_DET_THR_HIGH | AGC_PEAK_DET_PEAK_DET_THR_HIGH_0 | Threshold 2 for the high level of the peak detector | 0x0*
|  | AGC_PEAK_DET_PEAK_DET_THR_HIGH_1 | Threshold 3 for the high level of the peak detector | 0x1
24 | AGC_PEAK_DET_EN_AGC_PEAK | AGC_PEAK_DET_EN_AGC_PEAK_DISABLE | Disable the AGC peak detector | 0x0
|  | AGC_PEAK_DET_EN_AGC_PEAK_ENABLE | Enable the AGC peak detector | 0x1*
23:16 | AGC_THR_HIGH_AGC_THR_HIGH | AGC_THR_HIGH_AGC_THR_HIGH_DEFAULT |  | 0x69*
15:8 | AGC_THR_LOW_AGC_THR_LOW | AGC_THR_LOW_AGC_THR_LOW_DEFAULT |  | 0x40*
7:4 | ATT_CTRL_ATT_CTRL_MAX | ATT_CTRL_ATT_CTRL_MAX_DEFAULT |  | 0xB*
3:0 | ATT_CTRL_SET_RX_ATT_CTRL | ATT_CTRL_SET_RX_ATT_CTRL_DEFAULT |  | 0x0*