# Overview

The RSL15 system contains 16 general purpose input/output (GPIO) pads that can be configured:

- To support the sensor and communications interfaces, output clocks, and other I/Os
- As general-purpose I/Os controllable from the Arm Cortex-M33 core

The RSL15 system includes dedicated I/O pads for the following functionalities:

- The SWDCLK and SWDIO (also used as JTCK and JTMS) pads for the standard SWJ-DP debug port included with the Arm Cortex-M33 core — for more information, see Debug Port.
- A reset pad (NRESET) — for more information, see Resets.
- An antenna pad (RF) — for more information, see RF Front-End.

All other input and output functionality is routed through 16 configurable GPIOs. For more information about the functional configuration of GPIO pads, see Functional Configuration.

The GPIO pads support a variety of physical configuration parameters that can be used to properly interface with external components. These configuration parameters include:

- Pull-up and pull-down resistors
- Low-pass input filtering
- Configurable output drive strength

A complete description of the physical configuration of GPIOs can be found in Physical Configuration.

The "GPIO Pad and Multiplexing" figure shows a simplified pad drawing for a GPIO. This figure includes the physical configuration, functional multiplexing, and TrustZone security gating of input and output signals.

Figure: GPIO Pad and Multiplexing

A description of the direct use of GPIO pads as general-purpose inputs/outputs, rather than as part of an interface, is described in Direct Control.

All of the GPIO pads are powered from the VDDO power supply. For more information about this power supply and its configuration, see Power Supply Overview.

Access to the GPIOs and the input/output functionalities they provide can be restricted in non-secure modes by clearing the GPIO_CFG_NS_ACCESS_GPIO bits in the GPIO_CFG registers, and configuring the SYSCTRL_NS_ACCESS_PERIPH_CFG0 register, respectively.