# Flash Copier

This module copies data from the flash into any DMA-accessible memory or the CRC block. This module can also run in comparison mode. In this mode, the 38-bit data read from flash is verified with a reference value, but not written to any memory. This is useful to verify that a sector has been properly erased, and for other test purposes.

The flash copier is configured using the following registers:

- FLASH_COPY_SRC_ADDR_PTR: defines the flash source address (byte oriented). In 32-bit copier mode or in comparator mode, this pointer must point to the beginning of a word (two LSBs are ignored).
- FLASH_COPY_DST_ADDR_PTR: defines the destination address (byte oriented). Addressing corresponds to logical memory instances in normal order, as viewed by the Arm Cortex-M33 processor and must point to the beginning of a word (two LSBs are ignored). This pointer is not used in comparator mode or when the flash copier destination is the CRC block.
- FLASH_COPY_WORD_CNT: indicates how many words are to be written in the destination (in copier mode) or the number of words to be read and verified (in comparator mode).
- FLASH_COPY_CFG: configures MODE (copier or comparator), flash access FLASH_COPY_CFG_PRIORITY, FLASH_COPY_CFG_COPY_DEST (memory or CRC), FLASH_COPY_CFG_COMP_MODE (constant or checkboard), FLASH_COPY_CFG_COMP_ADDR_DIR (up or down), and FLASH_COPY_CFG_COMP_ADDR_STEP (increment FLASH_COPY_SRC_ADDR_PTR by one or two words).

NOTE: While the flash copier is running, the FLASH_COPY_CFG, FLASH_COPY_SRC_ADDR_PTR, FLASH_COPY_DST_ADDR_PTR, and FLASH_WORD_CNT registers are not writable.

In copier mode, the flash is read with or without error correction coding (ECC), based on the FLASH_ECC_CTRL_COPIER_ECC_CTRL bit in the FLASH_ECC_CTRL register. In comparator mode, the flash is always read without ECC. For more information on ECC, see Error-Correction Coding.

The flash copier execution state and status is controlled using the FLASH_COPY_CTRL register. This includes the following control and status bits:

- The FLASH_COPY_CTRL_START bit is used to start the flash copier.
- The FLASH_COPY_CTRL_STOP bit is used to stop the flash copier; if the flash copier receives both start and stop requests at the same time, the flash copier is stopped.
  - The copy or comparator operation can be stopped using this bit before the copy has been completed. The copy operation can be continued by giving the FLASH_COPY_CTRL_START command, as the address pointers and word counter retain the values required to continue the copy operation.
- The FLASH_COPY_CTRL_BUSY status bit indicates when the flash copier is busy copying data.
- The FLASH_COPY_CTRL_ERROR status bit indicates if the flash copier has observed an error; this status bit is cleared when the flash copier is started using the FLASH_COPY_CTRL_START bit.

While the copier is busy, the following behaviors occur in each flash copier mode:

When the word counter reaches zero or when a write error occurs (copier mode only), or when a verification error occurs (comparator mode only), then the FLASH_COPY_CTRL_BUSY status bit is cleared and a FLASH0_COPY interrupt is generated. In the case of an error, the FLASH_COPY_CTRL_ERROR bit in the FLASH_COPY_CTRL register is set.

When the flash copier is running, the flash access priority is defined by the FLASH_COPY_CFG_PRIORITY bit in the FLASH_COPY_CFG register:

1. When FLASH_COPY_CFG_PRIORITY = FLASH_CPU_PRIORITY, the Arm Cortex-M33 processor has priority over the flash copier.
2. When FLASH_COPY_CFG_PRIORITY = FLASH_COPIER_PRIORITY, the flash copier has priority over the Arm Cortex-M33 processor.

When writing to its destination memory, memory arbitration priority is handled between the flash copier and any DMA memory access, as explained in Memory Instances. The flash copier acts as a DMA access regarding the priority handling between the flash copier, the Arm Cortex-M33 processor, and the baseband controller.

NOTE: While the flash copier is running, it constantly tries to read from the flash memory, in case the destination memory is not available due to an access conflict with the Arm Cortex-M33 processor or DMA. Therefore, we recommend that you avoid such memory access conflicts, as this results in additional reads from flash which increase the power consumption

For registers, see Flash Copier Registers.