# System Control Block

Address | Register Name | Register Write | Register Read | Default | Description
--- | --- | --- | --- | --- | ---
0xE000ED00 | SCB_CPUID | - | (31:24) IMPLEMENTER | 0x41 | Implementer code
|  | - | (23:20) VARIANT | 0x0 | Implementation variant
|  | - | (19:16) ARCHITECTURE | 0xF | Architecture number
|  | - | (15:4) PARTNO | 0xD21 | Part number
|  | - | (3:0) REVISION | 0x4 | Revision code
0xE000ED04 | SCB_ICSR | (31) PENDNMISET | (31) PENDNMISET | 0x0 | Sets the NMI exception pending
|  | (30) PENDNMICLR | - | N/A | Pend NMI clear
|  | (28) PENDSVSET | (28) PENDSVSET | 0x1 | Write 1 to set pending status for PendSV exception. Read indicates PendSV pending status
|  | (27) PENDSVCLR | - | N/A | Write 1 to clear PendSV exception pending status
|  | (26) PENDSTSET | (26) PENDSTSET | 0x1 | Write 1 to set pending status for SYSTICK exception. Read value indicates SYSTICK pending status
|  | (25) PENDSTCLR | - | N/A | Write 1 to clear SYSTICK exception pending status
|  | (24) STTNS | (24) STTNS | 0x0 | SysTick target non-secure (RAZ/WI from non-secure state)
|  | - | (23) ISRPREEMPT | 0x0 | Indicates that a pending interrupt is going to be active in the next step
|  | - | (22) ISRPENDING | 0x0 | Indicates that an external interrupt is pending
|  | - | (20:12) VECTPENDING | 0x0 | Pending external interrupt number
|  | - | (11) RETTOBASE | 0x0 | Set to 1 when the an exception handler is being run.
|  | - | (8:0) VECTACTIVE | 0x0 | Number of current running interrupt service routine
0xE000ED08 | SCB_VTOR | (31:7) TBLOFF | (31:7) TBLOFF | 0x0 | Table offset value in code or RAM region. Must be multiple of 128.
0xE000ED0C | SCB_AIRCR | (31:16) VECTKEY | (31:16) VECTKEY | 0xFA05 | Access key for writing this register. Must be set to 0x05FA to write the other register fields.
|  | - | (15) ENDIANESS | 0x0 | Indicates endianess for data.
|  | (14) PRIS | (14) PRIS | 0x0 | Prioritize Secure exceptions
|  | (13) BFHFNMINS | (13) BFHFNMINS | 0x0 | BusFault, HardFault and NMI non-secure enable.
|  | (10:8) PRIGROUP | (10:8) PRIGROUP | 0x0 | Priority group setting. Controls how many bits in the priority register are used for pre-empty priority vs. sub-priority.
|  | (3) SYSRESETREQ_S | (3) SYSRESETREQ_S | 0x0 | System reset request secure or non secure config
|  | (2) SYSRESETREQ | - | N/A | Requests a chip-level system reset
|  | (1) VECTCLRACTIVE | - | N/A | Clears all active exception state information
0xE000ED10 | SCB_SCR | (4) SEVONPEND | (4) SEVONPEND | 0x0 | Set to 1 to cause the WFE to wake up if a new interrupt is pended
|  | (3) SLEEPDEEPS | (3) SLEEPDEEPS | 0x0 | Sleep deep secure state access
|  | (2) SLEEPDEEP | (2) SLEEPDEEP | 0x0 | Enable SLEEPDEEP output signal when entering sleep mode
|  | (1) SLEEPONEXIT | (1) SLEEPONEXIT | 0x0 | Enable sleep on exit feature when returning from handler to thread mode
0xE000ED14 | SCB_CCR | (18) BP | (18) BP | 0x0 | Branch prediction enable
|  | (10) STKOFHFNMIGN | (10) STKOFHFNMIGN | 0x0 | Stack overflow in HardFauld and NMI ignore
|  | (8) BFHFNMIGN | (8) BFHFNMIGN | 0x0 | Ignore data bus faults in hard fault and NMI exceptions
|  | (4) DIV_0_TRP | (4) DIV_0_TRP | 0x0 | Trap on divide by zero
|  | (3) UNALIGN_TRP | (3) UNALIGN_TRP | 0x0 | Trap on unaligned data access
|  | (1) USERSETMPEND | (1) USERSETMPEND | 0x0 | Allow user code to write to software trigger interrupt register
|  | - | (0) RESERVED_AT_1 | 0x1 | reserved
0xE000ED18 | SCB_SHPR1 | (31:24) NVIC_SECURE_FAULT_PRIORITY | (31:24) NVIC_SECURE_FAULT_PRIORITY | 0x0 | Configure the secure fault priority
|  | (23:16) NVIC_USAGE_FAULT_PRIORITY | (23:16) NVIC_USAGE_FAULT_PRIORITY | 0x0 | Configure the usage fault priority
|  | (15:8) NVIC_BUS_FAULT_PRIORITY | (15:8) NVIC_BUS_FAULT_PRIORITY | 0x0 | Configure the bus fault priority
|  | (7:0) NVIC_MEM_FAULT_PRIORITY | (7:0) NVIC_MEM_FAULT_PRIORITY | 0x0 | Configure the memory fault priority
0xE000ED1C | SCB_SHPR2 | (31:24) NVIC_SVC_PRIORITY | (31:24) NVIC_SVC_PRIORITY | 0x0 | Configure the SVCall priority
0xE000ED20 | SCB_SHPR3 | (31:24) NVIC_SYSTICK_PRIORITY | (31:24) NVIC_SYSTICK_PRIORITY | 0x0 | Configure the SysTick interrupt priority
|  | (23:16) NVIC_PENDSV_PRIORITY | (23:16) NVIC_PENDSV_PRIORITY | 0x0 | Configure the PendSV priority
|  | (7:0) NVIC_DBGMONITOR_PRIORITY | (7:0) NVIC_DBGMONITOR_PRIORITY | 0x0 | Configure the Debug Monitor priority
0xE000ED24 | SCB_SHCSR | - | (21) HARDFAULTPENDED | 0x0 | Hard fault exception pended state
|  | - | (20) SECUREFAULTPENDED | 0x0 | Secure fault exception pended state
|  | (19) SECUREFAULTENA | (19) SECUREFAULTENA | 0x0 | Secure fault handler enable
|  | (18) USGFAULTENA | (18) USGFAULTENA | 0x0 | Usage fault handler enable
|  | (17) BUSFAULTENA | (17) BUSFAULTENA | 0x0 | Bus fault handler enable
|  | (16) MEMFAULTENA | (16) MEMFAULTENA | 0x0 | Memory management fault handler enable
|  | (15) SVCALLPENDED | (15) SVCALLPENDED | 0x0 | SVCall is pending or was started and replaced by a higher priority exception
|  | (14) BUSFAULTPENDED | (14) BUSFAULTPENDED | 0x0 | Bus fault is pending or was started and replaced by a higher priority exception
|  | (13) MEMFAULTPENDED | (13) MEMFAULTPENDED | 0x0 | Memory management fault is pending or was started and replaced by a higher priority exception
|  | (12) USGFAULTPENDED | (12) USGFAULTPENDED | 0x0 | Usage fault is pending or was started and replaced by a higher priority exception
|  | (11) SYSTICKACT | (11) SYSTICKACT | 0x0 | SYSTICK exception handler is active
|  | (10) PENDSVACT | (10) PENDSVACT | 0x0 | PendSV exception handler is active
|  | (8) MONITORACT | (8) MONITORACT | 0x0 | Debug monitor exception handler is active
|  | (7) SVCALLACT | (7) SVCALLACT | 0x0 | SVCall exception handler is active
|  | (5) NMIACT | (5) NMIACT | 0x0 | NMI exception hangler is active
|  | (4) SFAULTACT | (4) SFAULTACT | 0x0 | Secure fault exception handler is active
|  | (3) USGFAULTACT | (3) USGFAULTACT | 0x0 | Usage fault exception handler is active
|  | (1) BUSFAULTACT | (1) BUSFAULTACT | 0x0 | Bus fault exception handler is active
|  | (0) MEMFAULTACT | (0) MEMFAULTACT | 0x0 | Memory management fault exception handler is active
0xE000ED28 | SCB_CFSR | (25) DIVBYZERO | (25) DIVBYZERO | 0x0 | Indicates divide by zero will take place
|  | (24) UNALIGNED | (24) UNALIGNED | 0x0 | Indicates unaligned access will take place
|  | (20) STKOF | (20) STKOF | 0x0 | Stack overflow flag
|  | (19) NOCP | (19) NOCP | 0x0 | Attempt to execute a coprocessor instruction
|  | (18) INVPC | (18) INVPC | 0x0 | Attempt to do exception with bad value in EXC_RETURN number
|  | (17) INVSTATE | (17) INVSTATE | 0x0 | Attempt to switch to invalid (e.g. ARM) state
|  | (16) UNDEFINSTR | (16) UNDEFINSTR | 0x0 | Attempt to execute an undefined instruction
|  | - | (15) BFARVALID | 0x0 | Indicates if bus fault address register is valid
|  | - | (13) LSPERR | 0x0 | Lazy state preservation error
|  | (12) STKERR | (12) STKERR | 0x0 | Indicates stacking error
|  | (11) UNSTKERR | (11) UNSTKERR | 0x0 | Indicates unstacking error
|  | (10) IMPRECISERR | (10) IMPRECISERR | 0x0 | Indicates imprecise data access violation
|  | (9) PRECISERR | (9) PRECISERR | 0x0 | Indicates precise data access violation
|  | (8) IBUSERR | (8) IBUSERR | 0x0 | Indicates instruction access violation
|  | - | (7) MMARVALID | 0x0 | Indicates if memory management fault address register is valid
|  | - | (5) MLSPERR | 0x0 | Inidicates if memory management lazy state preservation error flag
|  | (4) MSTKERR | (4) MSTKERR | 0x0 | Indicates stacking error
|  | (3) MUNSTKERR | (3) MUNSTKERR | 0x0 | Indicates unstacking error
|  | (1) DACCVIOL | (1) DACCVIOL | 0x0 | Indicates data access violation
|  | (0) IACCVIOL | (0) IACCVIOL | 0x0 | Indicates instruction access violation
0xE000ED2C | SCB_HFSR | (31) DEBUGEVT | (31) DEBUGEVT | 0x0 | Indicates hard fault is triggered by debug event
|  | (30) FORCED | (30) FORCED | 0x0 | Indicates hard fault is taken because of a lower priority (e.g., bus, memory management or usage) fault
|  | (1) VECTBL | (1) VECTBL | 0x0 | Indicates hard fault is taken due to failed vector fetch
0xE000ED30 | SCB_DFSR | (4) EXTERNAL | (4) EXTERNAL | 0x0 | Indicates external debug request signal asserted
|  | (3) VCATCH | (3) VCATCH | 0x0 | Indicates vector fetch occurred
|  | (2) DWTTRAP | (2) DWTTRAP | 0x0 | Indicates DWT match occurred
|  | (1) BKPT | (1) BKPT | 0x0 | Indicates BKPT instruction executed
|  | (0) HALTED | (0) HALTED | 0x0 | Indicates halt requested by NVIC
0xE000ED34 | SCB_MMFAR | - | (31:0) NVIC_MMAR | 0x0 | Memory Management address
0xE000ED38 | SCB_BFAR | - | (31:0) NVIC_BFAR | 0x0 | Bus Fault address
0xE000ED8C | SCB_NSACR | - | (11) CP11 | 0x0 | Enable non-secure access to the Floating-point extension
|  | (10) CP10 | (10) CP10 | 0x0 | Enables Non-secure access to the Floating-point Extension