### BB_INTSTAT1

Bit Field | Read/Write | Field Name | Description
--- | --- | --- | ---
15 | R | FIFOINTSTAT | FIFO interrupt status
6 | R | TIMESTAMPTGT2INTSTAT | Time stamp target timer 2 interrupt status
5 | R | TIMESTAMPTGT1INTSTAT | Time stamp target timer 1 interrupt status
4 | R | FINETGTIMINTSTAT | Fine target timer interrupt status
3 | R | SWINTSTAT | SW triggered interrupt status
2 | R | CRYPTINTSTAT | Encryption engine interrupt status
1 | R | SLPINTSTAT | Sleep mode interrupt status
0 | R | CLKNINTSTAT | CLKN/half slot interrupt status

Bit Field | Field Name | Value Symbol | Value Description | Hex Value
--- | --- | --- | --- | ---
15 | FIFOINTSTAT | FIFOINTSTAT_0 | No FIFO interrupt | 0x0*
|  | FIFOINTSTAT_1 | A FIFO interrupt is pending | 0x1
6 | TIMESTAMPTGT2INTSTAT | TIMESTAMPTGT2INTSTAT_0 | No fine target timer 2 interrupt | 0x0*
|  | TIMESTAMPTGT2INTSTAT_1 | A fine target timer 2 interrupt is pending | 0x1
5 | TIMESTAMPTGT1INTSTAT | TIMESTAMPTGT1INTSTAT_0 | No fine target timer 1 interrupt | 0x0*
|  | TIMESTAMPTGT1INTSTAT_1 | A fine target timer 1 interrupt is pending | 0x1
4 | FINETGTIMINTSTAT | FINETGTIMINTSTAT_0 | No fine target timer interrupt | 0x0*
|  | FINETGTIMINTSTAT_1 | A fine target timer interrupt is pending | 0x1
3 | SWINTSTAT | SWINTSTAT_0 | No SW triggered interrupt | 0x0*
|  | SWINTSTAT_1 | A SW triggered interrupt is pending | 0x1
2 | CRYPTINTSTAT | CRYPTINTSTAT_0 | No encryption / decryption interrupt | 0x0*
|  | CRYPTINTSTAT_1 | An encryption / decryption interrupt is pending | 0x1
1 | SLPINTSTAT | SLPINTSTAT_0 | No end of sleep mode interrupt | 0x0*
|  | SLPINTSTAT_1 | An end of sleep mode interrupt is pending | 0x1
0 | CLKNINTSTAT | CLKNINTSTAT_0 | No half slot interrupt | 0x0*
|  | CLKNINTSTAT_1 | A half slot interrupt is pending | 0x1