### RF_REG08

Bit Field | Read/Write | Field Name | Description
--- | --- | --- | ---
31:30 | RW | MOD_INFO_RX_DIV_CK_RX | Set the clock divider for the Rx mode (banked)
29 | RW | MOD_INFO_RX_SYMBOL_2BIT_RX | Rx symbol bits composition (banked)
28:24 | RW | MOD_INFO_RX_DR_M_RX | Unsigned value determining the oversampling frequency and consequently the data-rate (banked)
23:22 | RW | MOD_INFO_TX_DIV_CK_TX | Set the clock divider for the Tx mode (banked)
21 | RW | MOD_INFO_TX_SYMBOL_2BIT_TX | Tx symbol bits composition (banked)
20:16 | RW | MOD_INFO_TX_DR_M_TX | Unsigned value determining the oversampling frequency and consequently the data-rate (banked)
14 | RW | CHANNEL_SWITCH_IQ | Switch I and Q channels
13:8 | RW | CHANNEL_CHANNEL | Channel number
3 | RW | BANK_DATARATE_TX_NRX | Select the data-rate register
2 | RW | BANK_STD_BLE_RATES | Select the actual bank behavior
1:0 | RW | BANK_BANK | Select the used bank

Bit Field | Field Name | Value Symbol | Value Description | Hex Value
--- | --- | --- | --- | ---
31:30 | MOD_INFO_RX_DIV_CK_RX | MOD_INFO_RX_DIV_CK_RX_DEFAULT | 00 => /1, 01 => /2, 1x => /3 | 0x0*
29 | MOD_INFO_RX_SYMBOL_2BIT_RX | MOD_INFO_RX_SYMBOL_2BIT_RX_DISABLE | Each symbol is not composed by 2 bits (OQPSK or 4FSK) | 0x0*
|  | MOD_INFO_RX_SYMBOL_2BIT_RX_ENABLE | Each symbol is composed by 2 bits (OQPSK or 4FSK) | 0x1
28:24 | MOD_INFO_RX_DR_M_RX | MOD_INFO_RX_DR_M_RX_DEFAULT | This frequency is the system frequency (16 or 24 MHz) divided by this value+1 | 0x0*
23:22 | MOD_INFO_TX_DIV_CK_TX | MOD_INFO_TX_DIV_CK_TX_DEFAULT | 00 => /1, 01 => /2, 1x => /3 | 0x0*
21 | MOD_INFO_TX_SYMBOL_2BIT_TX | MOD_INFO_TX_SYMBOL_2BIT_TX_DISABLE | Each symbol is not composed by 2 bits (OQPSK or 4FSK) | 0x0*
|  | MOD_INFO_TX_SYMBOL_2BIT_TX_ENABLE | Each symbol is composed by 2 bits (OQPSK or 4FSK) | 0x1
20:16 | MOD_INFO_TX_DR_M_TX | MOD_INFO_TX_DR_M_TX_DEFAULT | This frequency is the system frequency (16 or 24 MHz) divided by this value+1 | 0x0*
14 | CHANNEL_SWITCH_IQ | CHANNEL_SWITCH_IQ_DISABLE | Don't switch I and Q channels | 0x0*
|  | CHANNEL_SWITCH_IQ_ENABLE | Switch I and Q channels | 0x1
13:8 | CHANNEL_CHANNEL | CHANNEL_CHANNEL_DEFAULT |  | 0x0*
3 | BANK_DATARATE_TX_NRX | BANK_DATARATE_TX_NRX_RX | Rx data-rate | 0x0*
|  | BANK_DATARATE_TX_NRX_TX | Tx data-rate | 0x1
2 | BANK_STD_BLE_RATES | BANK_STD_BLE_RATES_CUSTOM | Custom rates | 0x0*
|  | BANK_STD_BLE_RATES_STANDARD | Standard BLE rates | 0x1
1:0 | BANK_BANK | BANK_BANK_DEFAULT |  | 0x0*