### BB_DFIFCNTL

Bit Field | Read/Write | Field Name | Description
--- | --- | --- | ---
7 | RW | ANTSWITCH_BEH | Define the antenna switch qualifier behavior
6 | RW | SAMPREQ_BEH | Define the I and Q sampling request behavior
5:4 | RW | SAMPVALID_BEH | Define the I and Q sample qualifier behavior
3:2 | RW | IF_WIDTH | Define the I and Q sample interface width
1 | RW | MSB_LSB_ORDER | Define whether symbol is sent MSB or LSB first
0 | RW | SYMBOL_ORDER | Define whether I sample or Q sample is sent first

Bit Field | Field Name | Value Symbol | Value Description | Hex Value
--- | --- | --- | --- | ---
7 | ANTSWITCH_BEH | ANTSWITCH_BEH_0 | radio_out[28] is a pulse | 0x0*
|  | ANTSWITCH_BEH_1 | radio_out[28] is a toggle | 0x1
6 | SAMPREQ_BEH | SAMPREQ_BEH_0 | radio_out[29] is a pulse | 0x0*
|  | SAMPREQ_BEH_1 | radio_out[29] is a toggle | 0x1
5:4 | SAMPVALID_BEH | SAMPVALID_BEH_0 | I and Q sample aligned on radio_in[33] rising edges | 0x0
|  | SAMPVALID_BEH_1 | I and Q sample aligned on radio_in[33] falling edges | 0x1
|  | SAMPVALID_BEH_2 | I and Q sample aligned on radio_in[33] edges (toggle mode) | 0x2
|  | SAMPVALID_BEH_3 | NA | 0x3*
3:2 | IF_WIDTH | IF_WIDTH_0 | NA | 0x0
|  | IF_WIDTH_1 | 4-bit interface | 0x1
|  | IF_WIDTH_2 | 8-bit interface | 0x2
|  | IF_WIDTH_3 | 16-bit interface | 0x3*
1 | MSB_LSB_ORDER | MSB_LSB_ORDER_0 | MSB sent first | 0x0*
|  | MSB_LSB_ORDER_1 | LSB sent first | 0x1
0 | SYMBOL_ORDER | SYMBOL_ORDER_0 | I sample is sent first | 0x0*
|  | SYMBOL_ORDER_1 | Q sample is sent first | 0x1