### LIN_CTRL

Bit Field | Read/Write | Field Name | Description
--- | --- | --- | ---
8 | W | RESET | Reset the LIN module to default configuration
7 | R | RHC | This bit is set, when frame header is successfully received (synchronization passed and frame identifier received). Bit is cleared during transition to RX_ID state. Setting of bit to high by controller has higher priority than bit clear by CM33 (frame identifier received). Bit is cleared on MCU read. Bit is cleared during transition to RX_ID state. Setting of bit to high by controller has higher priority than bit clear by CM33
6 | R | RXF | This bit is set when LIN controller successfully receives all data bytes and checksum is correct. Bit is cleared during transition to RX_ID state. Setting of bit to high by controller has higher priority than bit clear by CM33.
5 | R | TXF | This bit is set when controller starts to transmit. Bit is cleared when all bytes are transmitted or bit error occurs or break/sync is detected or during transition to RX_ID state.
4 | R | ENABLE_STATUS | LIN enable status
1 | W | DISABLE | Disable the LIN
0 | W | ENABLE | Enable the LIN

Bit Field | Field Name | Value Symbol | Value Description | Hex Value
--- | --- | --- | --- | ---
8 | RESET | LIN_RESET | Reset the LIN module | 0x1
7 | RHC | NO_LIN_FH_RX | No frame header received | 0x0*
|  | LIN_FH_RX | Frame header received | 0x1
6 | RXF | LIN_RX_ONGOING | Recevied process on-going | 0x0*
|  | LIN_RX_DONE | Received process done | 0x1
5 | TXF | LIN_TX_DONE | Transmit process done | 0x0*
|  | LIN_TX_ONGOING | Transmit process on-going | 0x1
4 | ENABLE_STATUS | LIN_STATUS_DISABLE | LIN inactives | 0x0*
|  | LIN_STATUS_ENABLE | LIN actives | 0x1
1 | DISABLE | LIN_DISABLE | LIN disables | 0x1
0 | ENABLE | LIN_ENABLE | LIN enables | 0x1