### BB_DEEPSLCNTL

Bit Field | Read/Write | Field Name | Description
--- | --- | --- | ---
31 | RW | EXTWKUPDSB | External wake-up disable
15 | R | DEEP_SLEEP_STAT | Indicator of current deep sleep clock mux status
3 | RW | DEEP_SLEEP_CORR_EN | Half slot counter integer and fractional part correction (apply when system has been woken-up from deep sleep mode)
2 | RW | DEEP_SLEEP_ON | RW-BLE core power mode control
1 | RW | RADIO_SLEEP_EN | Control the radio module
0 | RW | OSC_SLEEP_EN | Control the RF high frequency crystal oscillator

Bit Field | Field Name | Value Symbol | Value Description | Hex Value
--- | --- | --- | --- | ---
31 | EXTWKUPDSB | EXTWKUPDSB_0 | RW-BLE core can be woken by external wake-up | 0x0*
|  | EXTWKUPDSB_1 | RW-BLE core cannot be woken up by external wake-up | 0x1
15 | DEEP_SLEEP_STAT | DEEP_SLEEP_STAT_0 | RW-BLE core is not yet in deep sleep mode | 0x0*
|  | DEEP_SLEEP_STAT_1 | RW-BLE core is in deep sleep mode (only low_power_clk is running) | 0x1
3 | DEEP_SLEEP_CORR_EN | DEEP_SLEEP_CORR_EN_0 | No action happens if it is written with 0 | 0x0*
|  | DEEP_SLEEP_CORR_EN_1 | Enables fine counter and base time counter when written | 0x1
2 | DEEP_SLEEP_ON | DEEP_SLEEP_ON_0 | RW-BLE core in normal active mode | 0x0*
|  | DEEP_SLEEP_ON_1 | Request RW-BLE core to switch in deep sleep mode | 0x1
1 | RADIO_SLEEP_EN | RADIO_SLEEP_EN_0 | Radio stands in normal active mode | 0x0*
|  | RADIO_SLEEP_EN_1 | Allow to disable radio | 0x1
0 | OSC_SLEEP_EN | OSC_SLEEP_EN_0 | High frequency crystal oscillator stands in normal active mode | 0x0*
|  | OSC_SLEEP_EN_1 | Allow to disable high frequency crystal oscillator | 0x1