### RF_BIAS_0_2

Bit Field | Read/Write | Field Name | Description
--- | --- | --- | ---
31:28 | RW | BIAS_2_IQ_RXTX_6 | VCOM_MX bias
27:24 | RW | BIAS_2_IQ_RXTX_5 | VCOM_LO bias
23:20 | RW | BIAS_1_IQ_RXTX_3 | PrePA Casc bias
19:16 | RW | BIAS_1_IQ_RXTX_2 | PrePA In bias
15:12 | RW | BIAS_0_IQ_RXTX_1 | PA backoff bias
11:8 | RW | BIAS_0_IQ_RXTX_0 | PA bias
7 | RW | INTERFACE_CONF_EN_SYNC_IFACE | Interfaces resynchronization
6:4 | RW | INTERFACE_CONF_APB_WAIT_STATE | Select the number of wait states during the APB transaction
1:0 | RW | INTERFACE_CONF_SPI_SELECT | Select the SPI mode

Bit Field | Field Name | Value Symbol | Value Description | Hex Value
--- | --- | --- | --- | ---
31:28 | BIAS_2_IQ_RXTX_6 | BIAS_2_IQ_RXTX_6_DEFAULT |  | 0x3*
27:24 | BIAS_2_IQ_RXTX_5 | BIAS_2_IQ_RXTX_5_DEFAULT |  | 0x8*
23:20 | BIAS_1_IQ_RXTX_3 | BIAS_1_IQ_RXTX_3_DEFAULT |  | 0x6*
19:16 | BIAS_1_IQ_RXTX_2 | BIAS_1_IQ_RXTX_2_DEFAULT |  | 0x6*
15:12 | BIAS_0_IQ_RXTX_1 | BIAS_0_IQ_RXTX_1_DEFAULT |  | 0x7*
11:8 | BIAS_0_IQ_RXTX_0 | BIAS_0_IQ_RXTX_0_DEFAULT |  | 0x3*
7 | INTERFACE_CONF_EN_SYNC_IFACE | INTERFACE_CONF_EN_SYNC_IFACE_DISABLE | Interfaces are not resynchronized if the clock is available | 0x0*
|  | INTERFACE_CONF_EN_SYNC_IFACE_ENABLE | Interfaces are resynchronized if the clock is available | 0x1
6:4 | INTERFACE_CONF_APB_WAIT_STATE | INTERFACE_CONF_APB_WAIT_STATE_DEFAULT |  | 0x0*
1:0 | INTERFACE_CONF_SPI_SELECT | INTERFACE_CONF_SPI_SELECT_LEGACY_SPI | Legacy SPI | 0x0*
|  | INTERFACE_CONF_SPI_SELECT_ADVANCED_SPI | Advanced SPI | 0x1
|  | INTERFACE_CONF_SPI_SELECT_BLIM4SME_SPI | BLIM4SME SPI | 0x2