## CMSIS DMA Driver Enumeration Type Documentation

### _DMA_SEL_t

Location: Driver_DMA.h:44

Selects the DMA channel.

Members

- DMA_CH_0 = 0

DMA channel 0.

- DMA_CH_1 = 1

DMA channel 1.

- DMA_CH_2 = 2

DMA channel 2.

- DMA_CH_3 = 3

DMA channel 3.

### _DMA_TRG_t

Location: Driver_DMA.h:54

Selects the DMA src/dst target interface.

Members

- DMA_TRG_MEM = 0

- DMA_TRG_SPI0 = 1

Source / destination target = SPI0.

- DMA_TRG_SPI1 = 2

Source / destination target = SPI1.

- DMA_TRG_I2C0 = 3

Source / destination target = I2C0.

- DMA_TRG_I2C1 = 4

Source / destination target = I2C1.

- DMA_TRG_UART = 5

Source / destination target = UART.

- DMA_TRG_PCM = 6

Source / destination target = PCM.

- DMA_TRG_TOF = 7

Source / destination target = TOF.

### _DMA_SRC_STEP_t

Location: Driver_DMA.h:68

Selects the step size increment to the DMA channel source address.

Members

- DMA_CFG0_SRC_ADDR_STATIC = 0x00

Do not increment the source address used by DMA channel.

- DMA_CFG0_SRC_ADDR_INCR_1 = 0x01

Set the step size of DMA channel source address to 1.

- DMA_CFG0_SRC_ADDR_INCR_2 = 0x02

Set the step size of DMA channel source address to 2.

- DMA_CFG0_SRC_ADDR_INCR_3 = 0x03

Set the step size of DMA channel source address to 3.

- DMA_CFG0_SRC_ADDR_INCR_4 = 0x04

Set the step size of DMA channel source address to 4.

- DMA_CFG0_SRC_ADDR_INCR_5 = 0x05

Set the step size of DMA channel source address to 5.

- DMA_CFG0_SRC_ADDR_INCR_6 = 0x06

Set the step size of DMA channel source address to 6.

- DMA_CFG0_SRC_ADDR_INCR_7 = 0x07

Set the step size of DMA channel source address to 7.

- DMA_CFG0_SRC_ADDR_DECR_8 = 0x08

Set the step size of DMA channel source address to negative 8.

- DMA_CFG0_SRC_ADDR_DECR_7 = 0x09

Set the step size of DMA channel source address to negative 7.

- DMA_CFG0_SRC_ADDR_DECR_6 = 0x0A

Set the step size of DMA channel source address to negative 6.

- DMA_CFG0_SRC_ADDR_DECR_5 = 0x0B

Set the step size of DMA channel source address to negative 5.

- DMA_CFG0_SRC_ADDR_DECR_4 = 0x0C

Set the step size of DMA channel source address to negative 4.

- DMA_CFG0_SRC_ADDR_DECR_3 = 0x0D

Set the step size of DMA channel source address to negative 3.

- DMA_CFG0_SRC_ADDR_DECR_2 = 0x0E

Set the step size of DMA channel source address to negative 2.

- DMA_CFG0_SRC_ADDR_DECR_1 = 0x0F

Set the step size of DMA channel source address to negative 1.

### _DMA_DST_STEP_t

Location: Driver_DMA.h:90

Selects the step size increment to the DMA channel destination address.

Members

- DMA_CFG0_DEST_ADDR_STATIC = 0x00

Do not increment the destination address used by DMA channel.

- DMA_CFG0_DEST_ADDR_INCR_1 = 0x01

Set the step size of DMA channel destination address to 1.

- DMA_CFG0_DEST_ADDR_INCR_2 = 0x02

Set the step size of DMA channel destination address to 2.

- DMA_CFG0_DEST_ADDR_INCR_3 = 0x03

Set the step size of DMA channel destination address to 3.

- DMA_CFG0_DEST_ADDR_INCR_4 = 0x04

Set the step size of DMA channel destination address to 4.

- DMA_CFG0_DEST_ADDR_INCR_5 = 0x05

Set the step size of DMA channel destination address to 5.

- DMA_CFG0_DEST_ADDR_INCR_6 = 0x06

Set the step size of DMA channel destination address to 6.

- DMA_CFG0_DEST_ADDR_INCR_7 = 0x07

Set the step size of DMA channel destination address to 7.

- DMA_CFG0_DEST_ADDR_DECR_8 = 0x08

Set the step size of DMA channel destination address to negative 8.

- DMA_CFG0_DEST_ADDR_DECR_7 = 0x09

Set the step size of DMA channel destination address to negative 7.

- DMA_CFG0_DEST_ADDR_DECR_6 = 0x0A

Set the step size of DMA channel destination address to negative 6.

- DMA_CFG0_DEST_ADDR_DECR_5 = 0x0B

Set the step size of DMA channel destination address to negative 5.

- DMA_CFG0_DEST_ADDR_DECR_4 = 0x0C

Set the step size of DMA channel destination address to negative 4.

- DMA_CFG0_DEST_ADDR_DECR_3 = 0x0D

Set the step size of DMA channel destination address to negative 3.

- DMA_CFG0_DEST_ADDR_DECR_2 = 0x0E

Set the step size of DMA channel destination address to negative 2.

- DMA_CFG0_DEST_ADDR_DECR_1 = 0x0F

Set the step size of DMA channel destination address to negative 1.

### _DMA_SRC_DST_TRANS_LENGHT_SEL_t

Location: Driver_DMA.h:112

Selects whether the transfer length counter depends on either the source word counts or the destination word count.

Members

- DMA_CFG0_DEST_TRANS_LENGTH_SEL = 0x00

Transfer length counter depends on the destination word count.

- DMA_CFG0_SRC_TRANS_LENGTH_SEL = 0x01

Transfer length counter depends on the size word count.

### _DMA_DATA_MODE_t

Location: Driver_DMA.h:121

Selects how often data is transferred.

Members

- DMA_REPEAT = 0x0U

Data to be transfered repeatedly.

- DMA_SINGLE = 0x1U

Single data transfer.

### _DMA_BYTE_ORDER_t

Location: Driver_DMA.h:129

Selects the order of the data bytes.

Members

- DMA_ENDIANNESS_LITTLE = 0x0U

Little endian to be used.

- DMA_ENDIANNESS_BIG = 0x1U

Big endian to be used.

### _DMA_WORD_SIZE_t

Location: Driver_DMA.h:137

Selects the src/dst data word size.

Members

- DMA_CFG0_DEST_WORD_SIZE_32BITS_TO_32BITS = 0x00

Source data uses 32-bit word and destination data uses 32-bit word.

- DMA_CFG0_DEST_WORD_SIZE_32BITS_TO_4BITS = 0x01

Source data uses 32-bit word and destination data uses 4-bit word.

- DMA_CFG0_DEST_WORD_SIZE_32BITS_TO_8BITS = 0x02

Source data uses 32-bit word and destination data uses 8-bit word.

- DMA_CFG0_DEST_WORD_SIZE_32BITS_TO_16BITS = 0x04

Source data uses 32-bit word and destination data uses 16-bit word.

- DMA_CFG0_DEST_WORD_SIZE_4BITS_TO_32BITS = 0x08

Source data uses 4-bit word and destination data uses 32-bit word.

- DMA_CFG0_DEST_WORD_SIZE_4BITS_TO_4BITS = 0x09

Source data uses 4-bit word and destination data uses 4-bit word.

- DMA_CFG0_DEST_WORD_SIZE_4BITS_TO_8BITS = 0x0A

Source data uses 4-bit word and destination data uses 8-bit word.

- DMA_CFG0_DEST_WORD_SIZE_4BITS_TO_16BITS = 0x0C

Source data uses 4-bit word and destination data uses 16-bit word.

- DMA_CFG0_DEST_WORD_SIZE_4BITS_TO_24BITS = 0x0E

Source data uses 4-bit word and destination data uses 24-bit word.

- DMA_CFG0_DEST_WORD_SIZE_8BITS_TO_32BITS = 0x10

Source data uses 8-bit word and destination data uses 32-bit word.

- DMA_CFG0_DEST_WORD_SIZE_8BITS_TO_4BITS = 0x11

Source data uses 8-bit word and destination data uses 4-bit word.

- DMA_CFG0_DEST_WORD_SIZE_8BITS_TO_8BITS = 0x12

Source data uses 8-bit word and destination data uses 8-bit word.

- DMA_CFG0_DEST_WORD_SIZE_8BITS_TO_16BITS = 0x14

Source data uses 8-bit word and destination data uses 16-bit word.

- DMA_CFG0_DEST_WORD_SIZE_8BITS_TO_24BITS = 0x16

Source data uses 8-bit word and destination data uses 24-bit word.

- DMA_CFG0_DEST_WORD_SIZE_16BITS_TO_32BITS = 0x20

Source data uses 16-bit word and destination data uses 32-bit word.

- DMA_CFG0_DEST_WORD_SIZE_16BITS_TO_4BITS = 0x21

Source data uses 16-bit word and destination data uses 4-bit word.

- DMA_CFG0_DEST_WORD_SIZE_16BITS_TO_8BITS = 0x22

Source data uses 16-bit word and destination data uses 8-bit word.

- DMA_CFG0_DEST_WORD_SIZE_16BITS_TO_16BITS = 0x24

Source data uses 16-bit word and destination data uses 16-bit word.

- DMA_CFG0_DEST_WORD_SIZE_16BITS_TO_24BITS = 0x26

Source data uses 16-bit word and destination data uses 24-bit word.

- DMA_CFG0_DEST_WORD_SIZE_24BITS_TO_4BITS = 0x31

Source data uses 24-bit word and destination data uses 4-bit word.

- DMA_CFG0_DEST_WORD_SIZE_24BITS_TO_8BITS = 0x32

Source data uses 24-bit word and destination data uses 8-bit word.

- DMA_CFG0_DEST_WORD_SIZE_24BITS_TO_16BITS = 0x34

Source data uses 24-bit word and destination data uses 16-bit word.

- DMA_CFG0_DEST_WORD_SIZE_24BITS_TO_24BITS = 0x36

Source data uses 24-bit word and destination data uses 24-bit word.

### _DMA_CH_PRI_t

Location: Driver_DMA.h:166

Selects priority of DMA channels.

Members

- DMA_CH_PRI_0 = 0x0U

Channel priority = 0.

- DMA_CH_PRI_1 = 0x1U

Channel priority = 1.

- DMA_CH_PRI_2 = 0x2U

Channel priority = 2.

- DMA_CH_PRI_3 = 0x3U

Channel priority = 3.

### _ADC_EVENT_SRC_t

Location: Driver_DMA.h:176

Selects DMA interrupt channel source.

Members

- DMA_DMA0_EVENT = 1 << DMA_CH_0

DMA channel 0 event.

- DMA_DMA1_EVENT = 1 << DMA_CH_1

DMA channel 1 event.

- DMA_DMA2_EVENT = 1 << DMA_CH_2

DMA channel 2 event.

- DMA_DMA3_EVENT = 1 << DMA_CH_3

DMA channel 3 event.