# Functional Configuration

The GPIO pads can be configured using the GPIO_CFG_IO_MODE bit field from the GPIO_CFG_* registers:

- For a variety of digital output modes
- For a general-purpose digital input mode, with the input function configured by the GPIO_SRC_* registers

The "GPIO Use Case Multiplexing" table contains a list of the multiplexed functional modes for which GPIOs can be configured.

In addition to standard digital functional configuration, certain GPIOs can be configured for operation in both run and low power modes, such as Sleep Mode. Specifically:

| • | Wakeup functionality is only available on GPIO[0:3]; see Power Modes for more information.

| • | The RTC clock can be output on GPIO0; see Clock Generation for more information.

| • | The PWM (always-on) can be output on GPIO4; see PWM for more information.

| • | The simple DAC can be output on GPIO7; see Simple Low-Power DAC for more information.

These special modes require the GPIO to be placed in a high impedance mode, with its digital input and output driver disabled (GPIO_MODE_DISABLE), and all pull-up or pull-down resisters disabled.

IMPORTANT: To prevent cross-talk with the SWD debugging interface, which can potentially crash the IDE, we recommend that you do not run high frequency signals (greater then 1 MHz) on GPIO2 while debugging with the RSL15 Evaluation and Development Board.

CAUTION: While a GPIO can be configured to be both an output and an input, it is the user application's responsibility to ensure that the GPIO is not driving an output to a pad that is also being driven externally. If a GPIO pad signal has two drivers, the physical values and inputs that are read from this pad are considered undefined.

Table: GPIO Use Case Multiplexing
GPIO | Mode | Description and Notes
--- | --- | ---
0-3 | RTC_CLK_INPUT | External RTC clock source; requires the GPIO to be in high impedance mode. For more information, see Clock Distribution.
0 | RTC_CLK_OUTPUT | RTC clock output. For more information, see Clock Distribution.
0-3 | WAKEUP_SOURCE | Wakeup source from low power modes. For more information on wakeup configuration, see Power Modes.
2 | JTAG_TDO | JTAG Test Data Out. Configuration for use in JTAG mode overrides other uses of GPIO 2, as described in JTAG I/O Functional Configuration.
3 | JTAG_TDI | JTAG Test Data In. Configuration for use in JTAG mode overrides other uses of GPIO 3, as described in JTAG I/O Functional Configuration.
4 | JTAG_TRST | JTAG Test Reset. Configuration for use in a 5-wire JTAG configuration overrides other uses of GPIO 4, as described in JTAG I/O Functional Configuration.
4 | AO-PWM | Always On PWM. This PWM is enabled using the ACS_PWM_AO_CTRL register. This PWM signal can be output in sleep modes if the GPIO is configured for high-impedance mode. For more information, see PWM
7 | SDAC_OUTPUT | SDAC output; requires the GPIO to be in high impedance mode. The SDAC is enabled using the ACS_SDAC_CFG register. For more information, see Simple Low-Power DAC
9 | SAR_ADC SUPPLY | SAR ADC voltage supply and reference (as configured using SENSOR_SAR_CFG). For more information, see SAR-ADC .
0-15 | SAR_ADC_INPUT | Successive Approximation ADC (SAR-ADC) analog input; requires the GPIO to be configured for high-impedance mode. For more information, see SAR-ADC .
LSAD_INPUT | Low Speed ADC (LSAD) analog input; requires the GPIO to be configured for high-impedance mode. For more information, see LSAD.
CURRENT_SOURCE_OUTPUT | Current source analog output; requires the GPIO to be configured for high-impedance mode. For more information, see Current Source
ACOMP_INPUT | Analog comparator analog input; requires the GPIO to be configured for high-impedance mode. For more information, see Simple Low-Power DAC.
SLOWCLK (output) SYSCLK (output) USRCLK (output) RCCLK (output) SWCLK (output) EXTCLK (output) RFCLK (output) STANDBYCLK (output) SENSORCLK (output) | Clocking. For more information, see Clock Components.
UART0_RX UART0_TX SPI0_MOSI/DATA0 SPI0_MISO/DATA1 SPI0_DATA2 SPI0_DATA3 SPI0_CS SPI0_CLK SPI1_MOSI/DATA0 SPI1_MISO/DATA1 SPI1_DATA2 SPI1_DATA3 SPI1_CS SPI1_CLK I2C0_SCL I2C0_SDA PWM0 PWM1 PWM2 PWM3 PWM4 PWM0_INV PWM1_INV PWM2_INV PWM3_INV PWM4_INV PCM_SERI PCM_SERO PCM_FRAME PCM_CLK | Interfaces. For more information, see Communication Interfaces.
AOUT | Analog test output; requires the GPIO to be configured for high-impedance mode. For more information, see Analog Test Output

## JTAG I/O Functional Configuration

When configured for serial wire (SW) mode, only the reserved SWCLK and SWDIO pads are used by the SWJ-DP interface. When configured for JTAG mode, the SWJ-DP interface uses the following additional pads along with the reserved pads to form a 4- or 5-wire JTAG interface:

- GPIO 2 configured as TDO
- GPIO 3 configured as TDI
- GPIO 4 configured as TRST (5-wire JTAG interface only)

The GPIO_CFG_IO_MODE bit field in the GPIO_CFG registers is overridden for GPIO 4, when CM33_JTAG_TRST_ENABLED is set using the GPIO_JTAG_SW_PAD_CFG_CM33_JTAG_TRST_EN bit from the GPIO_JTAG_SW_PAD_CFG register. The GPIO_CFG_IO_MODE bit field in the GPIO_CFG registers is overridden for GPIOs 2 and 3, when CM33_JTAG_DATA_ENABLED is set using the CM33_JTAG_DATA_EN bit from the GPIO_JTAG_SW_PAD_CFG register.

## Analog Test Output

The analog test output (AOUT) can be used to provide access to internal analog and digital signals for test and debug purposes.

IMPORTANT: All signals that are output using AOUT are available for test measurement and debug only. Power supply signals routed to AOUT must not be used to supply external components.

The AOUT signal is configured using the ACS_AOUT_CTRL register, which has the following configuration options:

Test Signal Selection

The ACS_AOUT_CTRL_TEST_AOUT bit-field is used to select the test signal that is output on AOUT. The ACS_AOUT_CTRL_AOUT_IOUT_SEL_TO_GPIO selects between the output of an AOUT test voltage and a current source output based on the PTAT (proportional to absolute temperature) current source used by the power management unit. This must be configured to match the ACS_AOUT_CTRL_TEST_AOUT configuration selecting SEL_IOUT_TO_GPIO for any current source output, and SEL_AOUT_TO_GPIO for all other outputs.

GPIO

The ACS_AOUT_CTRL_AOUT_TO_GPIO bit-field is used to select which GPIO the AOUT test signal is routed to. If a GPIO is configured to output the AOUT test signal, the GPIO output buffer and pull resistors are automatically disabled to ensure that analog circuitry connected through AOUT is not damaged.

IMPORTANT: The ACS_AOUT_CTRL register is also used to configure the RTC output on GPIO 0. Care must be taken when using this register for both use cases, to avoid zeroing out the AOUT configuration when configuring for RTC output and vice versa.