# Floating-Point Extension

Address | Register Name | Register Write | Register Read | Default | Description
--- | --- | --- | --- | --- | ---
0xE000EF34 | FPE_FPCCR | (31) ASPEN | (31) ASPEN | 0x1 | When this bit is set to 1, execution of a floating-point instruction sets the CONTROL.FPCA bit to 1
|  | (30) LSPEN | (30) LSPEN | 0x1 | Enable lazy contect save of FP state
|  | (29) LSPENS | (29) LSPENS | 0x0 | This bit controls whether the LSPEN bit is writable from the Non-secure state
|  | (28) CLRONRET | (28) CLRONRET | 0x0 | Clear floating point caller saved register on exception return
|  | (27) CLRONRETS | (27) CLRONRETS | 0x0 | CLRONRET secure only
|  | (26) TS | (26) TS | 0x0 | Threat FP registers as Secure enable
|  | (10) UFRDY | (10) UFRDY | 0x0 | Indicates whether the software executing when the processor allocated the floating-point stack frame was able to set the Usage Fault exeption to pending.
|  | (9) SPLIMVIOL | (9) SPLIMVIOL | 0x0 | This bit is banked between the Security states and indicates whether the floating-point context violates the stack pointer limit that was active when lazy state preservation was activated.
|  | (8) MONRDY | (8) MONRDY | 0x0 | Indicates whether the software executing when the processor allocated the floating-point stack frame was able to set the debug monitor execption to pending.
|  | (7) SFRDY | (7) SFRDY | 0x0 | Indicates whether the software executing when the processor allocated the floating-point stack frame was able to set the secure fault exception to pending.
|  | (6) BRDY | (6) BRDY | 0x0 | Indicates whether the software executing when the processor allocated the floating-point stack frame was able to set the bus fault exception to pending.
|  | (5) MMRDY | (5) MMRDY | 0x0 | Indicates whether the software executing when the processor allocated the floating-point stack frame was able to set the Mem Manage exception to pending.
|  | (4) HFRDY | (4) HFRDY | 0x0 | Indicates whether the software executing when the processor allocated the floating-point stack frame was able to set the Hard fault exception to pending.
|  | (3) THREAD | (3) THREAD | 0x0 | Indicates the processor mode when it allocated the floating-point stack frame.
|  | (2) S | (2) S | 0x1 | Security status of the floating-point context
|  | (1) USER | (1) USER | 0x0 | Indicates the privilege level of the software executing when the processor allocated the floating-point stack frame
|  | (0) LSPACT | (0) LSPACT | 0x0 | Indicates whether lazy preservation of the floating-point state is active.
0xE000EF38 | FPE_FPCAR | (31:3) ADDRESS | (31:3) ADDRESS | 0x0 | The location of the unpopulated floating-point register space allocated on an exception stack frame.
0xE000EF3C | FPE_FPDSCR | (26) AHP | (26) AHP | 0x0 | Alternative half-precision.
|  | (25) DN | (25) DN | 0x0 | Default NaN
|  | (24) FZ | (24) FZ | 0x0 | Flush-to-zero
|  | (23:22) RMODE | (23:22) RMODE | 0x0 | Rounding mode
0xE000EF40 | FPE_MVFR0 | (31:28) FPROUND | (31:28) FPROUND | 0x1 | All rounding modes supported
|  | (23:20) FPSQRT | (23:20) FPSQRT | 0x1 | Floating-point square root
|  | (19:16) FPDIVIDE | (19:16) FPDIVIDE | 0x1 | Floating-point divide
|  | (11:8) FPDP | (11:8) FPDP | 0x2 | Floating-point double-precision
|  | (7:4) FPSP | (7:4) FPSP | 0x2 | Floating-point single-precision
|  | (3:0) SIMDREG | (3:0) SIMDREG | 0x1 | SIMD registers. Indicates size of floating-point extension register file. (15*64 bit registers)
0xE000EF44 | FPE_MVFR1 | (31:28) FMAC | (31:28) FMAC | 0x1 | Fused multiply accumulate
|  | (27:24) FPHP | (27:24) FPHP | 0x1 | Floating-point half-precision
|  | (7:4) FPDNAN | (7:4) FPDNAN | 0x1 | Floating-point default NaN
|  | (3:0) FPFTZ | (3:0) FPFTZ | 0x1 | Floating-point flush-to-zero
0xE000EF48 | FPE_MVFR2 | (7:4) FPMISC | (7:4) FPMISC | 0x4 | Floating-point miscellaneous