/*******************************************************************************
 * ON Semiconductor                                                            *
 * NCV7383 Evaluation KIT                                                      *
 *                                                                             *
 * GPIO_macros.h                                                               *
 * General purpose IO macros                                                   *
 *                                                                             *
 * Created by: Filip Brtan                                                     *
 * Date: 30.07.2012                                                            *
 *                                                                             *
 *******************************************************************************/
 
#ifndef _GPIO_MACROS_H
#define _GPIO_MACROS_H

/* Variable types and common definitions */
#include "typedefs.h"   

/*******************************************************************************/
/* LEDs                                                                        */
/*******************************************************************************/
/* OUTPUT SIGNALS (0 => LED ON)*/                   
#define LEDS_ADDRESS PTP
#define LEDS_PORT PTP

#define LED1 PTP_PTP0
#define LED2 PTP_PTP1
#define LED3 PTP_PTP2
#define LED4 PTP_PTP3
#define LED5 PTP_PTP4
#define LED6 PTP_PTP5
#define LED7 PTP_PTP6
#define LED8 PTP_PTP7

#define LED1_MASK 0b00000001
#define LED2_MASK 0b00000010
#define LED3_MASK 0b00000100
#define LED4_MASK 0b00001000
#define LED5_MASK 0b00010000
#define LED6_MASK 0b00100000
#define LED7_MASK 0b01000000
#define LED8_MASK 0b10000000



/*******************************************************************************/
/* 8 way DIP Switch definition                                                 */
/*******************************************************************************/
/* INPUT SIGNALS */
#define SW_ADDRESS  PTIT
 
#define SW_ADDR0  PTIT_PTIT0
#define SW_ADDR1  PTIT_PTIT1 
#define SW_ADDR2  PTIT_PTIT2 
#define SW_ADDR3  PTIT_PTIT3 
#define SW_ADDR4  PTIT_PTIT4
#define SW_ADDR5  PTIT_PTIT5 
#define SW_ADDR6  PTIT_PTIT6 
#define SW_ADDR7  PTIT_PTIT7  

/*******************************************************************************/
/* Auxiliary MCU IO's                                                          */
/*******************************************************************************/ 
#define AUX_SS   PTS_PTS7
#define AUX_SCK  PTS_PTS6
#define AUX_MOSI PTS_PTS5
#define AUX_MISO PTS_PTS4
#define AUX_TXD  PTS_PTS3
#define AUX_RXD  PTS_PTS2
#define AUX_AD13 PT0AD_PT0AD13
#define AUX_AD14 PT0AD_PT0AD14

/* Aux Triger output */
#define TRIG AUX_SS
#define TRIG_SCOPE AUX_MOSI
 
/* FlexRay Strobe Signals */ 
#define STRB0   PTJ_PTJ3
#define STRB1   PTJ_PTJ4
#define STRB2   PTJ_PTJ5
#define STRB3   PTJ_PTJ6 
           
/*******************************************************************************/
/* Buttons definition                                                          */
/*******************************************************************************/
/* INPUT SIGNAL (0=> Button pressed)*/
#define BTN_IRQ PORTE_PE1         /* Maskable External interrupt pin */

/*******************************************************************************/
/* CAN transceiver signals                                                     */
/*******************************************************************************/
/* STB signal - Enable CAN transmitter  */
#define CAN_STB PTM_PTM2

#define EnableCAN_BD() CAN_STB=0
#define DisableCAN_BD() CAN_STB=1


/*******************************************************************************/
/* FLEXRAY transceiver signals                                                 */
/*******************************************************************************/
/* Output */
#define FR_BGE_A   PORTA_PA3   /* Channel A BGE pin */
#define FR_BGE_B   PORTE_PE2   /* Channel B BGE pin */

#define FR_STBN_A  PORTA_PA2   /* Channel A STANDBY pin */
#define FR_STBN_B  PORTE_PE3   /* Channel B STANDBY pin */

#define FR_TXEN_A  PTH_PTH2    /* Channel A TXEN pin */
#define FR_TXEN_B  PTH_PTH6    /* Channel B TXEN pin */

#define FR_TXD_A   PTH_PTH1    /* Channel A TXD pin */
#define FR_TXD_B   PTH_PTH5    /* Channel B TXD pin */

#define FR_CSN_A   PORTA_PA1   /* Channel A CSN pin */
#define FR_CSN_B   PORTB_PB0   /* Channel B CSN pin */

#define FR_SCK_A   PTM_PTM6    /* Channel A SCK pin */
#define FR_SCK_B   PORTE_PE4   /* Channel B SCK pin */

/* Output */
#define FR_SET_BGE_A_HZ()   DDRA_DDRA3=0   /* Channel A BGE pin */
#define FR_SET_BGE_B_HZ()   DDRE_DDRE2=0   /* Channel B BGE pin */
#define FR_SET_BGE_A_OUT()  DDRA_DDRA3=1   /* Channel A BGE pin */
#define FR_SET_BGE_B_OUT()  DDRE_DDRE2=1   /* Channel B BGE pin */

#define FR_SET_STBN_A_HZ()  DDRA_DDRA2=0   /* Channel A STANDBY pin */
#define FR_SET_STBN_B_HZ()  DDRE_DDRE3=0   /* Channel B STANDBY pin */
#define FR_SET_STBN_A_OUT() DDRA_DDRA2=1   /* Channel A STANDBY pin */
#define FR_SET_STBN_B_OUT() DDRE_DDRE3=1   /* Channel B STANDBY pin */

#define FR_SET_TXEN_A_HZ()  DDRH_DDRH2=0   /* Channel A TXEN pin */
#define FR_SET_TXEN_B_HZ()  DDRH_DDRH6=0   /* Channel B TXEN pin */
#define FR_SET_TXEN_A_OUT() DDRH_DDRH2=1   /* Channel A TXEN pin */
#define FR_SET_TXEN_B_OUT() DDRH_DDRH6=1   /* Channel B TXEN pin */

#define FR_SET_TXD_A_HZ()   DDRH_DDRH1=0   /* Channel A TXD pin */
#define FR_SET_TXD_B_HZ()   DDRH_DDRH5=0   /* Channel B TXD pin */
#define FR_SET_TXD_A_OUT()  DDRH_DDRH1=1   /* Channel A TXD pin */
#define FR_SET_TXD_B_OUT()  DDRH_DDRH5=1   /* Channel B TXD pin */

#define FR_SET_CSN_A_HZ()   DDRA_DDRA1=0   /* Channel A CSN pin */
#define FR_SET_CSN_B_HZ()   DDRB_DDRB0=0   /* Channel B CSN pin */
#define FR_SET_CSN_A_OUT()  DDRA_DDRA1=1   /* Channel A CSN pin */
#define FR_SET_CSN_B_OUT()  DDRB_DDRB0=1   /* Channel B CSN pin */

#define FR_SET_SCK_A_HZ()   DDRM_DDRM6=0   /* Channel A SCK pin */
#define FR_SET_SCK_B_HZ()   DDRE_DDRE4=0   /* Channel B SCK pin */
#define FR_SET_SCK_A_OUT()  DDRM_DDRM6=1   /* Channel A SCK pin */
#define FR_SET_SCK_B_OUT()  DDRE_DDRE4=1   /* Channel B SCK pin */

/* Input */                              
#define FR_ERRN_A  PORTA_PA0   /* Channel A ERRN pin */
#define FR_ERRN_B  PTIJ_PTIJ7  /* Channel B ERRN pin */

#define FR_RXD_A   PTIH_PTIH0  /* Channel A RXD pin */
#define FR_RXD_B   PTIH_PTIH4  /* Channel B RXD pin */

#define FR_SDO_A   PTIM_PTIM4  /* Channel A SDO pin */
#define FR_SDO_B   PORTB_PB1   /* Channel B SDO pin */

/* FlexRay CC output signals macro */
#define FR_CLR_TXD_AB() {asm BCLR _PTH,#0b00100010;}  /* Set TXDA and TXENA to 0 */
#define FR_SET_TXD_AB() {asm BSET _PTH,#0b00100010;}  /* Set TXDA and TXENA to 0 */
#define FR_CLR_TXEN_AB() {asm BCLR _PTH,#0b01000100;}  /* Set TXDA and TXENA to 0 */
#define FR_SET_TXEN_AB() {asm BSET _PTH,#0b01000100;}  /* Set TXDA and TXENA to 0 */
#define FR_CLR_TXD_TXEN_A() {asm BCLR _PTH,#0b00000110;}  /* Set TXDA and TXENA to 0 */
#define FR_CLR_TXD_TXEN_B() {asm BCLR _PTH,#0b01100000;}  /* Set TXDB and TXENB to 0 */
#define FR_SET_TXD_TXEN_A() {asm BSET _PTH,#0b00000110;}  /* Set TXDA and TXENA to 1 */
#define FR_SET_TXD_TXEN_B() {asm BSET _PTH,#0b01100000;}  /* Set TXDB and TXENB to 1 */   
#define FR_CLR_TXD_TXEN_AB() {asm BCLR _PTH,#0b01100110;}  /* Set TXDAB and TXENAB to 0 */
#define FR_SET_TXD_TXEN_AB() {asm BSET _PTH,#0b01100110;}  /* Set TXDAB and TXENAB to 1 */


/*******************************************************************************/
/* Voltage measurement channel select definition                               */
/*******************************************************************************/

#define Voltage_VCC_BD      0  // 0
#define Voltage_VIO         1  // 1
#define Voltage_VIO_BD      2  // 8
#define Voltage_VCC         3  // 9
#define Voltage_VBAT        4  // 10
#define Voltage_AUX13       5  // 13
#define Voltage_AUX14       6  // 14

/*******************************************************************************/
/* Voltage measurement channel select definition                               */
/*******************************************************************************/
#define Voltage_VCC_BD      0  // 0
#define Voltage_VIO         1  // 1
#define Voltage_VIO_BD      2  // 8
#define Voltage_VCC         3  // 9
#define Voltage_VBAT        4  // 10
#define Voltage_AUX13       5  // 13
#define Voltage_AUX14       6  // 14


/*******************************************************************************/
/* Indicator LEDs handling Macros                                              */
/*******************************************************************************/
 /* Set LED */ 
#define LED_ON(BitName)         (BitName = 0)
  
/* Clear LED */ 
#define LED_OFF(BitName)        (BitName = 1)

/* Toggle LED */ 
#define LED_TOGGLE(BitName)     (BitName ^= 1) 

/*******************************************************************************/
/* SPI Macros                                                                 */
/*******************************************************************************/
#define SPI1_Enable() SPI1CR1_SPE=1  /* Enable device */
#define SPI1_Disable() SPI1CR1_SPE=0 /* Disable device */

/*******************************************************************************/
/* PTI Timer macros                                                            */
/*******************************************************************************/
#define TIMER_100ns_START     PITFLT_PITFLT0 = 1
#define TIMER_1ms_START       PITFLT_PITFLT1 = 1 
#define TIMER_100ns_ELAPSED   PITTF_PITTF0
#define TIMER_1ms_ELAPSED     PITTF_PITTF1

 /* Group: ADC */
#define RDIV_VBAT     14 /* (3.9k+51k)/3.9k */
#define RDIV_VREG      2 /* (10k+10k)/10k */
#define Vref        3300 /* mV */




#endif /* _GPIO_MACROS_H */

/*******************************************************************************/