(NETLIST)
(FOR DRAWING: F:/RTC008/WORK/BRD/RTC008R1.BRD)
(GENERATED BY: ALLEGRO 16.5 P003 (v16-5-13C))
(Thu Aug 14 15:00:35 2014)
$PACKAGES
BERG_2X2_2P54 ! 'TEST POINTS, 4 THRU-HOLE PADS_1' ,
        ! '4 Round Pads, .060 with .040 Hole' ; PR1 
BERG_2X2_2P54 ! 'TEST POINTS, 4 THRU-HOLE PADS_B' ,
        ! '4 Round Pads, .060 with .040 Hole' ; PR2 PR3 PR4 PR5 PR6 PR7 PR8 ,
        PR9 PR10 PR11 PR12 
BERG_2X3_2P54 ! 'HEADER 2X3 THRU-HOLE_BERG_2X3_2' ! 'Header 2x3 Thru-Hole' ,
        ; J1 J5 J9 J12 J14 J18 J21 J26 
C0402 ! CAP_100NF_10V_0402_C0402_100NF ! 100nF ; C23 C25 C28 C29 C30 C31 ,
        C32 C33 C34 C35 C36 C37 C38 C40 C41 C42 C44 C46 C49 C53 
C0402 ! CAP_10NF_16V_0402_C0402_10NF ! 10nF ; C47 
C0402 ! CAP_10PF_50V_0402_C0402_10PF ! 10pF ; C48 C50 
C0402 ! CAP_1UF_10V_0402_C0402_1UF ! 1uF ; C22 C24 C51 C52 
C0402 ! 'CAP_2PF_50V_0402_C0402_2.0PF' ! '2.0pF' ; C1 C2 C3 C4 C5 C6 C7 C8 ,
        C9 C10 C11 C12 C13 C14 C15 C16 C17 C18 C19 C20 C54 C55 
C0402 ! 'CAP_4.7UF_6.3V_0402_C0402_4.7UF' ! '4.7uF' ; C39 C43 C45 
C0603 ! CAP_10UF_10V_0603_C0603_10UF_20 ! 10uF ! '20%' ; C27 
C1206 ! CAP_10UF_10V_TANT_3216_C1206_10 ! 10uF ; C21 C26 
'CON_571-0500' ! 'BANANA JACK, THRU-HOLE, BLACK_C' ,
        ! 'Banana Jack, Thru-Hole, Black' ; J46 
'CON_571-0500' ! 'BANANA JACK, THRU-HOLE, RED_CON' ,
        ! 'Banana Jack, Thru-Hole, Red' ; J43 
'CON_571-0500' ! 'BANANA JACK, THRU-HOLE, YELLOW_' ,
        ! 'Banana Jack, Thru-Hole, Yellow' ; J44 
CON_USB_B_RA ! 'CONN, USB-B, SMT_CON_USB_B_RA_C' ! 'Conn, USB-B, SMT' ; J62 
'CRY-4P-SMD1' ! 'CRYSTAL 12 MHZ_CRY-4P-SMD1_12 M' ! '12 MHz' ; Y1 
HDR_1X2_2P54 ! 'HEADER 2-PIN 0.1_HDR_1X2_2P54_H' ! 'Header 2-pin' ; J52 J53 
HDR_1X3_2P54 ! 'HEADER 3-PIN 0.1_HDR_1X3_2P54_H' ! 'Header 3-pin' ; J33 J36 ,
        J37 J45 J47 J48 J49 
L0402 ! 'FERRITE BEAD, 600 OHM, 0402_L04' ! 600 ; FB4 FB5 
L0603 ! 'FERRITE BEAD, 600 OHM, 0603_L06' ! 600 ; FB1 FB2 FB3 
LED_0603 ! 'LED_GREEN_0603_LED_0603_LED, GR' ! 'LED, Green' ; LED1 
MODULE_48QFN_0P40 ! 'TMP_14_MODULE_48QFN_0P40_DNI NB' ! 'DNI NB3W800L' ; U1 
QFN_64_0P5 ! 'FT2232H DUAL USB INTERFACE_2_QF' ! FT2232H ; U2 
R0201 ! 'SOLDER GAP_0_R0201_SOLDER GAP' ! 'Solder Gap' ; SG1 SG2 SG3 SG4 ,
        SG5 SG6 SG7 SG8 SG9 SG10 SG11 SG12 SG13 SG14 SG15 SG16 SG17 SG18 ,
        SG19 SG20 SG21 SG22 SG23 SG24 SG25 SG26 SG27 SG28 SG29 SG30 SG31 ,
        SG32 SG33 SG34 SG35 SG36 SG37 SG38 SG39 SG40 
R0402 ! RES_0_0402_R0402_0 ! 0 ; R2 R6 R10 R14 R18 R22 R25 R27 R30 R34 R37 ,
        R39 R44 R46 R56 R60 R64 R68 R72 R78 R79 R80 R81 R84 R85 R86 R87 R99 ,
        R100 
R0402 ! 'RES_0_0402_R0402_42.2' ! '42.2' ; R52 
R0402 ! 'RES_10K_0402_R0402_10K_5%' ! 10K ! '5%' ; R88 R89 R90 R92 R93 R94 
R0402 ! 'RES_12K_1%_0402_R0402_12K_1%' ! 12K ! '1%' ; R91 
R0402 ! 'RES_2.2K_0402_R0402_2.2K_5%' ! '2.2K' ! '5%' ; R96 
R0402 ! 'RES_27_0402_R0402_27_5%' ! 27 ! '5%' ; R1 R5 R9 R13 R17 R21 R26 ,
        R33 R38 R45 R51 R55 R59 R63 R67 R71 
R0402 ! 'RES_412_0402_R0402_DNI_1%' ! DNI ! '1%' ; R77 
R0402 ! 'RES_42.2_0402_R0402_49.9_1%' ! '49.9' ! '1%' ; R97 R98 
R0402 ! 'RES_42.2_0402_R0402_DNI 42.2_1%' ! 'DNI 42.2' ! '1%' ; R4 R8 R12 ,
        R16 R20 R24 R29 R36 R43 R50 R54 R58 R62 R66 R70 R74 
R0402 ! 'RES_42.2_0402_R0402_DNI_1%' ! DNI ! '1%' ; R3 R7 R11 R15 R19 R23 ,
        R28 R35 R42 R49 R53 R57 R61 R65 R69 R73 
R0402 ! 'RES_470_0402_R0402_470_5%' ! 470 ! '5%' ; R95 
R0402 ! 'RES_69.8_0402_R0402_DNI_1%' ! DNI ! '1%' ; R82 R83 
R0603 ! RES_0_0402_R0603_0 ! 0 ; R31 R32 
R0603 ! 'RES_2.2_0603_R0603_2.2_5%' ! '2.2' ! '5%' ; R75 R76 
R0603 ! 'RES_4.7K_0603_R0603_4.7K_5%' ! '4.7K' ! '5%' ; R47 R48 
R0603 ! 'RES_49.9_0603_R0603_49.9_1%' ! '49.9' ! '1%' ; R40 R41 
SMA_JACK_END_LAUNCH ! 'SMA JACK, END LAUNCH_4_SMA_JACK' ,
        ! 'SMA Jack, End Launch' ; J2 J3 J4 J6 J7 J8 J10 J11 J13 J15 J16 ,
        J17 J19 J20 J22 J23 J24 J25 J27 J28 J29 J30 J31 J32 J34 J35 J39 J40 ,
        J41 J42 J50 J51 J54 J55 J56 J57 J58 
SOT23_5P ! 'NCP 4586 3.3V REGULATOR_SOT23_5' ! 'NCP4586, 3.3V' ; U4 
SOT_143 ! 'PACDN004 2-CHAN ESD DIODE ARRAY' ! PACDN004 ; D1 
TP_30_60 ! 'TEST PAD 30 X 60 MIL_0_TP_30_60' ! 'Test Pad 30 x 60 mil' ; TP9 ,
        TP10 
TP_50_100 ! 'TEST PAD 50 X 100 MIL_0_TP_50_1' ! 'Test Pad 50 x 100 mil' ; ,
        TP11 TP12 TP13 TP14 
TP_70_135 ! 'TEST POINT, KEYSTONE 5015_1_TP_' ! 'Test Point, SMT' ; TP1 TP2 
TP_70_135 ! 'TEST POINT, KEYSTONE 5015_2_TP_' ! 'Test Point, SMT' ; TP3 TP4 ,
        TP7 TP8 
TP_70_135 ! 'TEST POINT, KEYSTONE 5015_3_TP_' ! 'Test Point, SMT' ; TP6 
TP_70_135 ! 'TEST POINT, KEYSTONE 5015_4_TP_' ! 'Test Point, SMT' ; TP5 
TSSOP_8_4P4W_0P65 ! '93LC46B SERIAL EEPROM_0_TSSOP_8' ! 93LC46B ; U3 
$NETS
3V3 ; C35.1 C36.1 C37.1 C38.1 C49.1 C51.1 FB4.2 FB5.2 R88.1 R89.1 R90.2 ,
        R92.1 R93.1 R94.1 TP10.1 U2.20 U2.31 U2.42 U2.50 U2.56 U3.6 U3.7 ,
        U3.8 U4.5 
CLKIN ; C13.1 R31.1 R40.2 R44.1 SG21.1 U1.5 
'CLKIN#' ; C11.1 R32.1 R37.1 R41.2 SG19.1 U1.4 
'CLKIN#_16407189' ; C55.1 J56.1 R98.1 R100.1 SG40.1 
CLKINR ; C9.1 R30.1 R31.2 SG16.1 
'CLKINR#' ; C7.1 R25.1 R32.2 SG13.1 
CLKIN_16407091 ; C54.1 J55.1 R97.1 R99.1 SG39.1 
DIF0 ; R1.1 U1.13 
DIF1 ; R9.1 U1.16 
DIF2 ; R17.1 U1.21 
DIF3 ; R26.1 U1.25 
DIF4 ; R38.1 U1.28 
DIF5 ; R51.1 U1.32 
DIF6 ; R59.1 U1.35 
DIF7 ; R67.1 U1.39 
'DIF0#' ; R5.1 U1.14 
'DIF1#' ; R13.1 U1.17 
'DIF2#' ; R21.1 U1.22 
'DIF3#' ; R33.1 U1.26 
'DIF4#' ; R45.1 U1.29 
'DIF5#' ; R55.1 U1.33 
'DIF6#' ; R63.1 U1.36 
'DIF7#' ; R71.1 U1.40 
FBOUT ; R86.2 R87.1 SG38.1 
'FBOUT#' ; R84.2 R85.1 SG37.1 
GND ; C1.2 C2.2 C3.2 C4.2 C5.2 C6.2 C8.2 C10.2 C12.2 C14.2 C15.2 C16.2 ,
        C17.2 C18.2 C19.2 C20.2 C26.2 C27.2 C28.2 C29.2 C30.2 C31.2 C32.2 ,
        C33.2 C34.2 C35.2 C36.2 C37.2 C38.2 C39.2 C40.2 C41.2 C42.2 C43.2 ,
        C44.2 C45.2 C46.2 C47.2 C48.2 C49.2 C50.2 C51.2 C52.2 C53.2 C54.2 ,
        C55.2 D1.1 FB3.1 J1.6 J2.2 J2.3 J2.4 J2.5 J3.2 J3.3 J3.4 J3.5 J4.2 ,
        J4.3 J4.4 J4.5 J5.6 J6.2 J6.3 J6.4 J6.5 J7.2 J7.3 J7.4 J7.5 J8.2 ,
        J8.3 J8.4 J8.5 J9.6 J10.2 J10.3 J10.4 J10.5 J11.2 J11.3 J11.4 J11.5 ,
        J12.6 J13.2 J13.3 J13.4 J13.5 J14.6 J15.2 J15.3 J15.4 J15.5 J16.2 ,
        J16.3 J16.4 J16.5 J17.2 J17.3 J17.4 J17.5 J18.6 J20.2 J20.3 J20.4 ,
        J20.5 J21.6 J22.2 J22.3 J22.4 J22.5 J24.2 J24.3 J24.4 J24.5 J25.2 ,
        J25.3 J25.4 J25.5 J26.6 J28.2 J28.3 J28.4 J28.5 J30.2 J30.3 J30.4 ,
        J30.5 J31.2 J31.3 J31.4 J31.5 J32.2 J32.3 J32.4 J32.5 J33.3 J34.2 ,
        J34.3 J34.4 J34.5 J35.2 J35.3 J35.4 J35.5 J36.3 J37.3 J39.2 J39.3 ,
        J39.4 J39.5 J40.2 J40.3 J40.4 J40.5 J41.2 J41.3 J41.5 J42.2 J42.3 ,
        J42.4 J42.5 J45.3 J46.1 J46.2 J47.3 J48.3 J49.3 J50.2 J50.3 J50.4 ,
        J50.5 J51.2 J51.3 J51.4 J51.5 J54.2 J54.3 J54.4 J54.5 J55.2 J55.3 ,
        J55.4 J55.5 J56.2 J56.3 J56.4 J56.5 J57.2 J57.3 J57.4 J57.5 J58.2 ,
        J58.3 J58.4 J58.5 J62.4 J62.5 J62.6 LED1.2 PR1.3 PR1.4 PR2.3 PR2.4 ,
        PR3.3 PR3.4 PR5.3 PR5.4 PR7.3 PR7.4 PR8.3 PR8.4 PR9.3 PR9.4 PR10.3 ,
        PR10.4 PR11.3 PR11.4 PR12.3 PR12.4 R3.2 R4.2 R7.2 R8.2 R11.2 R12.2 ,
        R15.2 R16.2 R19.2 R20.2 R23.2 R24.2 R28.2 R29.2 R35.2 R36.2 R42.2 ,
        R43.2 R48.2 R49.2 R50.2 R53.2 R54.2 R57.2 R58.2 R61.2 R62.2 R65.2 ,
        R66.2 R69.2 R70.2 R73.2 R74.2 R77.2 R82.2 R83.2 R91.2 R97.2 R98.2 ,
        TP11.1 TP12.1 TP13.1 TP14.1 U1.49 U2.1 U2.5 U2.10 U2.11 U2.13 U2.15 ,
        U2.25 U2.35 U2.47 U2.51 U3.5 U4.2 Y1.2 Y1.4 
GNDA ; C7.2 C9.2 C11.2 C13.2 C21.2 C22.2 C23.2 C24.2 C25.2 FB3.2 J19.2 ,
        J19.3 J19.4 J19.5 J23.2 J23.3 J23.4 J23.5 J27.2 J27.3 J27.4 J27.5 ,
        J29.2 J29.3 J29.4 J29.5 PR4.3 PR4.4 PR6.3 PR6.4 R40.1 R41.1 U1.2 
N07511 ; FB1.2 R75.1 R76.1 
N14576201 ; J31.1 J33.2 R47.2 R48.1 U1.48 
N14576354 ; J34.1 J36.2 U1.47 
N14576507 ; J37.2 J54.1 U1.1 
N16357698 ; LED1.1 R95.2 
N16367612 ; J53.1 R89.2 U2.17 U2.18 
N16407021 ; J57.1 R99.2 
N16407039 ; J58.1 R100.2 
N16407121 ; PR12.1 SG39.2 
N16407301 ; PR12.2 SG40.2 
N16423312 ; C26.1 FB2.1 J44.1 J44.2 
N16475854 ; J52.1 R88.2 U2.16 
N16706504 ; C48.1 U2.2 Y1.1 
N16706508 ; C50.1 U2.3 Y1.3 
N16706706 ; C43.1 C44.1 FB4.1 U2.9 
N16706738 ; C45.1 C46.1 FB5.1 U2.4 
N16707304 ; R96.2 U2.61 U3.3 
N16707308 ; R94.2 R96.1 U3.4 
N16707312 ; R92.2 U2.63 U3.1 
N16707410 ; R91.1 U2.6 
N16707506 ; C39.1 C40.1 C41.1 C42.1 U2.12 U2.37 U2.49 U2.64 
N16708128 ; R93.2 U2.62 U3.2 
N17534459 ; PR8.1 SG26.2 
N17534479 ; R54.1 SG25.2 
N17534630 ; PR9.1 SG30.2 
N17534636 ; R62.1 SG29.2 
N17534712 ; PR10.1 SG34.2 
N17534738 ; R70.1 SG33.2 
N17534779 ; J3.1 R2.2 
N17534788 ; J6.1 R6.2 
N17534967 ; J8.1 R10.2 
N17534987 ; PR2.2 SG8.2 
N17535002 ; R16.1 SG7.2 
N17535010 ; PR1.1 SG2.2 
N17535022 ; J11.1 R14.2 
N17535028 ; R4.1 SG1.2 
N17535048 ; J15.1 R18.2 
N17535085 ; J17.1 R22.2 
N17535117 ; J22.1 R27.2 
N17535148 ; J25.1 R34.2 
N17535159 ; PR3.2 SG12.2 
N17535165 ; R24.1 SG11.2 
N17535188 ; J28.1 R39.2 
N17535218 ; J30.1 R46.2 
N17535250 ; J32.1 R52.2 
N17535296 ; J35.1 R56.2 
N17535344 ; J39.1 R60.2 
N17535363 ; PR5.2 SG18.2 
N17535386 ; J40.1 R64.2 
N17535397 ; R36.1 SG17.2 
N17535416 ; PR1.2 SG4.2 
N17535431 ; J41.1 R68.2 
N17535466 ; R8.1 SG3.2 
N17535492 ; J42.1 R72.2 
N17535651 ; PR7.2 SG24.2 
N17535655 ; R50.1 SG23.2 
N17535760 ; PR2.1 SG6.2 
N17535764 ; R12.1 SG5.2 
N17535982 ; PR8.2 SG28.2 
N17535995 ; R58.1 SG27.2 
N17536091 ; PR3.1 SG10.2 
N17536101 ; R20.1 SG9.2 
N17536123 ; PR9.2 SG32.2 
N17536131 ; R66.1 SG31.2 
N17536257 ; PR5.1 SG15.2 
N17536259 ; R29.1 SG14.2 
N17536283 ; PR10.2 SG36.2 
N17536291 ; R74.1 SG35.2 
N17536425 ; PR7.1 SG20.2 
N17536429 ; R43.1 SG22.2 
N17546729 ; R83.1 R86.1 TP6.1 U1.9 
N17546745 ; R82.1 R84.1 TP5.1 U1.8 
N17584680 ; J45.2 R78.2 
N17585501 ; R77.1 U1.46 
N17586701 ; J47.2 R79.2 
N17587663 ; J48.2 R80.2 
N17587689 ; J49.2 R81.2 
N17589259 ; R78.1 U1.45 
N17589262 ; R79.1 U1.43 
N17589265 ; R80.1 U1.20 
N17589268 ; R81.1 U1.12 
N17589838 ; PR11.1 SG37.2 
N17589873 ; J50.1 R85.2 
N17589875 ; J51.1 R87.2 
N17589911 ; PR11.2 SG38.2 
N17608201 ; J27.1 R37.2 
N17608203 ; J29.1 R44.2 
N17608205 ; J19.1 R25.2 
N17608207 ; J23.1 R30.2 
N17636662 ; PR4.2 SG13.2 
N17636693 ; PR4.1 SG16.2 
N17638043 ; PR6.1 SG19.2 
N17638064 ; PR6.2 SG21.2 
OE_IO0 ; J1.3 U2.21 
OE_IO1 ; J5.3 U2.22 
OE_IO2 ; J9.3 U2.23 
OE_IO3 ; J12.3 U2.24 
OE_IO4 ; J14.3 U2.26 
OE_IO5 ; J18.3 U2.27 
OE_IO6 ; J21.3 U2.28 
OE_IO7 ; J26.3 U2.29 
OE_N0 ; J1.1 J1.4 J1.5 J2.1 U1.11 
OE_N1 ; J4.1 J5.1 J5.4 J5.5 U1.18 
OE_N2 ; J7.1 J9.1 J9.4 J9.5 U1.23 
OE_N3 ; J10.1 J12.1 J12.4 J12.5 U1.24 
OE_N4 ; J13.1 J14.1 J14.4 J14.5 U1.30 
OE_N5 ; J16.1 J18.1 J18.4 J18.5 U1.31 
OE_N6 ; J20.1 J21.1 J21.4 J21.5 U1.37 
OE_N7 ; J24.1 J26.1 J26.4 J26.5 U1.41 
OUT0 ; C1.1 R1.2 R2.1 R3.1 SG1.1 SG2.1 
OUT1 ; C3.1 R9.2 R10.1 R11.1 SG5.1 SG6.1 
OUT2 ; C5.1 R17.2 R18.1 R19.1 SG9.1 SG10.1 
OUT3 ; C8.1 R26.2 R27.1 R28.1 SG14.1 SG15.1 
OUT4 ; C12.1 R38.2 R39.1 R42.1 SG20.1 SG22.1 
OUT5 ; C15.1 R51.2 R52.1 R53.1 SG25.1 SG26.1 
OUT6 ; C17.1 R59.2 R60.1 R61.1 SG29.1 SG30.1 
OUT7 ; C19.1 R67.2 R68.1 R69.1 SG33.1 SG34.1 
OUT_N0 ; C2.1 R5.2 R6.1 R7.1 SG3.1 SG4.1 
OUT_N1 ; C4.1 R13.2 R14.1 R15.1 SG7.1 SG8.1 
OUT_N2 ; C6.1 R21.2 R22.1 R23.1 SG11.1 SG12.1 
OUT_N3 ; C10.1 R33.2 R34.1 R35.1 SG17.1 SG18.1 
OUT_N4 ; C14.1 R45.2 R46.1 R49.1 SG23.1 SG24.1 
OUT_N5 ; C16.1 R55.2 R56.1 R57.1 SG27.1 SG28.1 
OUT_N6 ; C18.1 R63.2 R64.1 R65.1 SG31.1 SG32.1 
OUT_N7 ; C20.1 R71.2 R72.1 R73.1 SG35.1 SG36.1 
SCL ; J52.2 TP7.1 U1.7 
SDA ; J53.2 TP8.1 U1.6 
USB_5V ; C52.1 C53.1 D1.4 J62.1 R95.1 TP9.1 U4.1 U4.3 
USB_DM ; D1.2 J62.2 U2.7 
USB_DP ; D1.3 J62.3 U2.8 
'USB_RST#' ; C47.1 R90.1 U2.14 
VDD ; C21.1 FB1.1 J43.1 J43.2 J45.1 J47.1 J48.1 J49.1 TP1.1 
VDDA_3 ; C22.1 C23.1 R75.2 TP2.1 U1.3 
VDDA_44 ; C24.1 C25.1 R76.2 TP3.1 U1.44 
VDDIO ; C27.1 C28.1 C29.1 C30.1 C31.1 C32.1 C33.1 C34.1 FB2.2 J1.2 J5.2 ,
        J9.2 J12.2 J14.2 J18.2 J21.2 J26.2 J33.1 J36.1 J37.1 R47.1 TP4.1 ,
        U1.10 U1.15 U1.19 U1.27 U1.34 U1.38 U1.42 
$NETS
$A_PROPERTIES
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n16407121'; 'N16407121'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n16407021'; 'N16407021'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n16407039'; 'N16407039'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n16407301'; 'N16407301'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):fbout'; 'FBOUT'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):\fbout#\'; 'FBOUT#'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17636662'; 'N17636662'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17636693'; 'N17636693'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17546729'; 'N17546729'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17589838'; 'N17589838'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17589875'; 'N17589875'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17589873'; 'N17589873'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):out_n7'; 'OUT_N7'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17608207'; 'N17608207'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17589268'; 'N17589268'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17608201'; 'N17608201'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17589265'; 'N17589265'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17608203'; 'N17608203'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17589262'; 'N17589262'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17589259'; 'N17589259'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17608205'; 'N17608205'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):oe_io0'; 'OE_IO0'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):out_n5'; 'OUT_N5'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17535995'; 'N17535995'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17535048'; 'N17535048'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17535492'; 'N17535492'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17534712'; 'N17534712'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17535655'; 'N17535655'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17535250'; 'N17535250'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17534788'; 'N17534788'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17536283'; 'N17536283'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17535148'; 'N17535148'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17536131'; 'N17536131'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17536425'; 'N17536425'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17535022'; 'N17535022'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17536257'; 'N17536257'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17534636'; 'N17534636'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17535117'; 'N17535117'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17535218'; 'N17535218'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17536259'; 'N17536259'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):oe_io4'; 'OE_IO4'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17535431'; 'N17535431'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17535085'; 'N17535085'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17535386'; 'N17535386'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17535296'; 'N17535296'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17534630'; 'N17534630'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17534459'; 'N17534459'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):out_n3'; 'OUT_N3'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):\dif0#\'; 'DIF0#'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):oe_n2'; 'OE_N2'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):oe_n0'; 'OE_N0'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):oe_n7'; 'OE_N7'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):oe_n3'; 'OE_N3'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):oe_n1'; 'OE_N1'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):oe_n5'; 'OE_N5'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):oe_n6'; 'OE_N6'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n16357698'; 'N16357698'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):\usb_rst#\'; 'USB_RST#'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):usb_dm'; 'USB_DM'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):usb_dp'; 'USB_DP'
SPACING_CONSTRAINT_SET 'DIFF_90'; 'USB_DP' 'USB_DM'
PHYSICAL_CONSTRAINT_SET 'DIFF_90'; 'USB_DP' 'USB_DM'
SAME_NET_SPACING_CONSTRAINT_SET 'DIFF_90'; 'USB_DP' 'USB_DM'
DIFFP_MIN_SPACE '9 MIL'; 'USB_DP' 'USB_DM'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):\3v3\'; '3V3'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):out_n1'; 'OUT_N1'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):clkin'; 'CLKIN'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):\clkin#\'; 'CLKIN#'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):\dif7#\'; 'DIF7#'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):\dif5#\'; 'DIF5#'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):\dif3#\'; 'DIF3#'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):out7'; 'OUT7'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):out6'; 'OUT6'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):out5'; 'OUT5'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):dif4'; 'DIF4'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n14576507'; 'N14576507'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):dif3'; 'DIF3'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):out2'; 'OUT2'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):dif1'; 'DIF1'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):dif0'; 'DIF0'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17536101'; 'N17536101'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17535028'; 'N17535028'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17535764'; 'N17535764'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17535165'; 'N17535165'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17535397'; 'N17535397'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n16707506'; 'N16707506'
SPACING_CONSTRAINT_SET 'PWR'; 'N16707506' '3V3' 'VDDA_44' 'VDDA_3'
PHYSICAL_CONSTRAINT_SET 'PWR'; 'N16707506' '3V3' 'VDDA_44' 'VDDA_3'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17535010'; 'N17535010'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n16706504'; 'N16706504'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n16708128'; 'N16708128'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n16706738'; 'N16706738'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n16707410'; 'N16707410'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n16706706'; 'N16706706'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n16707304'; 'N16707304'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):dif7'; 'DIF7'
PHYSICAL_CONSTRAINT_SET 'DIFF_85E'; 'DIF7' 'OUT0' 'DIF0' 'OUT1' 'DIF1' 'DIF2',
           'OUT2' 'OUT3' 'DIF3' 'OUT4' 'DIF4' 'DIF1#',
           'OUT5' 'DIF5' 'OUT6' 'DIF6' 'OUT7' 'DIF2#',
           'DIF3#' 'DIF4#' 'DIF5#' 'DIF6#' 'DIF7#' 'CLKIN#',
           'CLKIN' 'OUT_N0' 'OUT_N1' 'OUT_N2' 'DIF0#' 'CLKINR#',
           'CLKINR' 'OUT_N3' 'OUT_N4' 'OUT_N5' 'OUT_N6' 'OUT_N7',
           'N17546745' 'N17546729' 'FBOUT#' 'FBOUT' 'CLKIN_16407091' 'CLKIN#_16407189'
DIFFERENTIAL_PAIR 'DIFFPAIR1'; 'CLKIN_16407091' 'CLKIN#_16407189'
DIFFERENTIAL_PAIR 'DIFFPAIR0'; 'N17546745' 'N17546729'
DIFFERENTIAL_PAIR 'DP40'; 'USB_DP' 'USB_DM'
BUS_NAME 'OUT_(0_7)#'; 'OUT_N0' 'OUT_N1' 'OUT_N2' 'OUT_N3' 'OUT_N4' 'OUT_N5',
           'OUT_N6' 'OUT_N7'
DIFFERENTIAL_PAIR 'DP39'; 'CLKIN#' 'CLKIN'
DIFFERENTIAL_PAIR 'DP26'; 'DIF6' 'DIF6#'
DIFFERENTIAL_PAIR 'DP25'; 'DIF5' 'DIF5#'
DIFFERENTIAL_PAIR 'OUT4'; 'OUT4' 'OUT_N4'
DIFFERENTIAL_PAIR 'OUT3'; 'OUT3' 'OUT_N3'
DIFFERENTIAL_PAIR 'DP22'; 'DIF2' 'DIF2#'
DIFFERENTIAL_PAIR 'OUT1'; 'OUT1' 'OUT_N1'
DIFFERENTIAL_PAIR 'DP27'; 'DIF7' 'DIF7#'
BUS_NAME 'DIFF_(0_7)'; 'DIF7' 'DIF0' 'DIF1' 'DIF2' 'DIF3' 'DIF4',
           'DIF5' 'DIF6'
DIFFERENTIAL_PAIR 'OUT0'; 'OUT0' 'OUT_N0'
BUS_NAME 'OUT_(0_7)'; 'OUT0' 'OUT1' 'OUT2' 'OUT3' 'OUT4' 'OUT5',
           'OUT6' 'OUT7'
DIFFERENTIAL_PAIR 'DP20'; 'DIF0' 'DIF0#'
DIFFERENTIAL_PAIR 'DP21'; 'DIF1' 'DIF1#'
DIFFERENTIAL_PAIR 'OUT2'; 'OUT2' 'OUT_N2'
DIFFERENTIAL_PAIR 'DP23'; 'DIF3' 'DIF3#'
DIFFERENTIAL_PAIR 'DP24'; 'DIF4' 'DIF4#'
BUS_NAME 'DIFF_(0_7)#'; 'DIF1#' 'DIF2#' 'DIF3#' 'DIF4#' 'DIF5#' 'DIF6#',
           'DIF7#' 'DIF0#'
DIFFERENTIAL_PAIR 'OUT5'; 'OUT5' 'OUT_N5'
DIFFERENTIAL_PAIR 'OUT6'; 'OUT6' 'OUT_N6'
DIFFERENTIAL_PAIR 'OUT7'; 'OUT7' 'OUT_N7'
DIFFERENTIAL_PAIR 'CLKINR'; 'CLKINR#' 'CLKINR'
DIFFERENTIAL_PAIR 'FBOUT'; 'FBOUT#' 'FBOUT'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):scl'; 'SCL'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):sda'; 'SDA'
SAME_NET_SPACING_CONSTRAINT_SET 'PWR'; 'VDD' 'USB_5V' '3V3' 'VDDIO'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):vdd'; 'VDD'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n16367612'; 'N16367612'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n07511'; 'N07511'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17534479'; 'N17534479'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17534987'; 'N17534987'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17535002'; 'N17535002'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17535416'; 'N17535416'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17535760'; 'N17535760'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17536091'; 'N17536091'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17535466'; 'N17535466'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n16423312'; 'N16423312'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17535159'; 'N17535159'
SAME_NET_SPACING_CONSTRAINT_SET 'GND'; 'GND'
PHYSICAL_CONSTRAINT_SET 'GND'; 'GND' 'GNDA'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):gnd'; 'GND'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n16707308'; 'N16707308'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n16707312'; 'N16707312'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n16706508'; 'N16706508'
DIFFP_MIN_SPACE '5 MIL'; 'DIF7' 'OUT0' 'DIF0' 'OUT1' 'DIF1' 'DIF2',
           'OUT2' 'OUT3' 'DIF3' 'OUT4' 'DIF4' 'DIF1#',
           'OUT5' 'DIF5' 'OUT6' 'DIF6' 'OUT7' 'DIF2#',
           'DIF3#' 'DIF4#' 'DIF5#' 'DIF6#' 'DIF7#' 'CLKIN#',
           'CLKIN' 'OUT_N0' 'OUT_N1' 'OUT_N2' 'DIF0#' 'CLKINR#',
           'CLKINR' 'OUT_N3' 'OUT_N4' 'OUT_N5' 'OUT_N6' 'OUT_N7',
           'N17546745' 'N17546729' 'FBOUT#' 'FBOUT' 'CLKIN_16407091' 'CLKIN#_16407189'
SPACING_CONSTRAINT_SET 'DIFF_100E'; 'DIF7' 'OUT0' 'DIF0' 'OUT1' 'DIF1' 'DIF2',
           'OUT2' 'OUT3' 'DIF3' 'OUT4' 'DIF4' 'DIF1#',
           'OUT5' 'DIF5' 'OUT6' 'DIF6' 'OUT7' 'DIF2#',
           'DIF3#' 'DIF4#' 'DIF5#' 'DIF6#' 'DIF7#' 'CLKIN#',
           'CLKIN' 'OUT_N0' 'OUT_N1' 'OUT_N2' 'DIF0#' 'CLKINR#',
           'CLKINR' 'OUT_N3' 'OUT_N4' 'OUT_N5' 'OUT_N6' 'OUT_N7',
           'N17546745' 'N17546729' 'FBOUT#' 'FBOUT'
SAME_NET_SPACING_CONSTRAINT_SET 'DIFF_100E'; 'DIF7' 'OUT0' 'DIF0' 'OUT1' 'DIF1' 'DIF2',
           'OUT2' 'OUT3' 'DIF3' 'OUT4' 'DIF4' 'DIF1#',
           'OUT5' 'DIF5' 'OUT6' 'DIF6' 'OUT7' 'DIF2#',
           'DIF3#' 'DIF4#' 'DIF5#' 'DIF6#' 'DIF7#' 'CLKIN#',
           'CLKIN' 'OUT_N0' 'OUT_N1' 'OUT_N2' 'DIF0#' 'CLKINR#',
           'CLKINR' 'OUT_N3' 'OUT_N4' 'OUT_N5' 'OUT_N6' 'OUT_N7',
           'N17546745' 'N17546729' 'FBOUT#' 'FBOUT'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):out0'; 'OUT0'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):out1'; 'OUT1'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):dif2'; 'DIF2'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):out3'; 'OUT3'
SPACING_CONSTRAINT_SET 'DEFAULT'; 'N14576201' 'N14576507'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n14576201'; 'N14576201'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):usb_5v'; 'USB_5V'
SAME_NET_SPACING_CONSTRAINT_SET '3W'; 'N14576354'
SPACING_CONSTRAINT_SET '3W'; 'N14576354'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n14576354'; 'N14576354'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):out4'; 'OUT4'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):\dif1#\'; 'DIF1#'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):dif5'; 'DIF5'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):dif6'; 'DIF6'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):\dif2#\'; 'DIF2#'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):\dif4#\'; 'DIF4#'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):\dif6#\'; 'DIF6#'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):out_n0'; 'OUT_N0'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):out_n2'; 'OUT_N2'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n16475854'; 'N16475854'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):vddio'; 'VDDIO'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):oe_n4'; 'OE_N4'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):oe_io7'; 'OE_IO7'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):oe_io6'; 'OE_IO6'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):oe_io5'; 'OE_IO5'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):gnda'; 'GNDA'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17638043'; 'N17638043'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17638064'; 'N17638064'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):\clkinr#\'; 'CLKINR#'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):clkinr'; 'CLKINR'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):vdda_44'; 'VDDA_44'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):oe_io3'; 'OE_IO3'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17535344'; 'N17535344'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17535651'; 'N17535651'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17535363'; 'N17535363'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17536123'; 'N17536123'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17535188'; 'N17535188'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):out_n4'; 'OUT_N4'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17534779'; 'N17534779'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17534738'; 'N17534738'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17535982'; 'N17535982'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17534967'; 'N17534967'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17536291'; 'N17536291'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17584680'; 'N17584680'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17585501'; 'N17585501'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17536429'; 'N17536429'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17586701'; 'N17586701'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17587663'; 'N17587663'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17587689'; 'N17587689'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):oe_io1'; 'OE_IO1'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):oe_io2'; 'OE_IO2'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):out_n6'; 'OUT_N6'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):vdda_3'; 'VDDA_3'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17546745'; 'N17546745'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):n17589911'; 'N17589911'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):clkin_16407091'; 'CLKIN_16407091'
SPACING_CONSTRAINT_SET 'DIFF_85E'; 'CLKIN_16407091' 'CLKIN#_16407189'
SAME_NET_SPACING_CONSTRAINT_SET 'DIFF_85E'; 'CLKIN_16407091' 'CLKIN#_16407189'
LOGICAL_PATH '@rtc008r1.schematic1(sch_1):\clkin#_16407189\'; 'CLKIN#_16407189'
$END
